Next Steps For Improving Yield


Chipmakers are ramping new tools and methodologies to achieve sufficient yield faster, despite smaller device dimensions, a growing number of systematic defects, immense data volumes, and massive competitive pressure. Whether a 3nm process is ramping, or a 28nm process is being tuned, the focus is on reducing defectivity. The challenge is to rapidly identify indicators that can improve yield... » read more

Week In Review: Semiconductor Manufacturing, Test


The United States imposed further export controls aimed at preventing foreign firms from selling advanced chips to China or supplying Chinese firms with semiconductor processing tools. Under new regulations, companies looking to supply Chinese chipmakers with advanced manufacturing equipment (<14nm) must first obtain a license from the U.S. Department of Commerce. Officials noted that they h... » read more

Why Silent Data Errors Are So Hard To Find


Cloud service providers have traced the source of silent data errors to defects in CPUs — as many as 1,000 parts per million — which produce faulty results only occasionally and under certain micro-architectural conditions. That makes them extremely hard to find. Silent data errors (SDEs) are random defects produced in manufacturing, not a design bug or software error. Those defects gene... » read more

GUC GLink Test Chip Uses In-Chip Monitoring And Deep Data Analytics For High Bandwidth Die-To-Die Characterization


Advanced ASIC leader Global Unichip Corp (GUC) has developed GLink, a high-bandwidth, low-latency, and power-efficient die-to-die (D2D) interface. GLink offers the industry’s highest optimized interconnect solution for both CoWoS and InFO packaging technologies. The GUC and proteanTecs collaboration started with GUC’s second generation of GLink, known as GLink 2.0. The project target was... » read more

Week In Review: Manufacturing, Test


On Sunday, a 6.8-magnitude earthquake struck the southeast region of Taiwan, causing devastation. TSMC officials reported “no known significant impact for now.” Market research firm TrendForce arrived at a similar conclusion based on its analysis of individual fabs. The Biden administration announced appointment of the leadership team charged with implementing the US CHIPS and Science Ac... » read more

Making The Most Of Data Lakes


Having all the semiconductor data available is increasingly necessary for improving manufacturability, yield, and ultimately the reliability of end devices. But without sufficient knowledge of relationships between data from different processes and computationally efficient data structures, the value of any data is significantly reduced. In the semiconductor industry, reducing waste, decreas... » read more

Supply Chain Security And Counterfeit Detection Using Universal Chip Telemetry (UCT)


The recent shortage of chip supply and long lead times prompted system makers to turn to second tier suppliers and distributors for fulfilling their semiconductor needs. This in turn has put the spotlight on the growing concern of fraudulent or counterfeited Integrated Circuits (ICs). Proteus deep data analytics based on Universal Chip Telemetry (UCT) provides a new approach to supply chain ... » read more

Week in Review: Manufacturing, Test


Fab capacity STMicroelectronics and GlobalFoundries inked a deal to build a new jointly-operated 300mm fab adjacent to ST’s existing 300mm facility in Crolles, France. This facility is targeted to ramp at full capacity by 2026, with up to 620,000 300mm wafer per year production at full build-out (~42% ST and ~58% GF). The new facility will support several technologies, with a special focus... » read more

Elevating Production Testing With Deep Data Analytics And ACS At The Edge And Cloud


The level of system integration continues to increase at a rate of greater than 30% per year — fueled by the industry’s desire for increased capability, advanced process nodes, and "more than Moore" packaging techniques. Co-optimization of the hardware and software have also been required not only at the design stage, but at test and in the field. This white paper will present how to ele... » read more

Week In Review, Manufacturing, Test


Samsung announced initial production of its 3nm process node, which uses a gate-all-around (nanosheet) transistor structure that the company calls Multi-Bridge-Channel FET (MBCFET). The first-generation 3nm process can reduce power consumption by up to 45% compared with a 5nm process, as well as improve performance by 23% and reduce area by 16%, according to the company. The second-generation 3... » read more

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