Chip Aging Becoming Key Factor In Data Center Economics


Chip aging is becoming a much bigger concern inside of data centers, where it can impact server uptime, utilization rates, and the amount of energy needed to drive signals and cool entire server racks. Aging in chips is the result of both higher logic utilization and increasing transistor density. This is problematic for data centers, in general, but especially for AI chips where digital log... » read more

Using Predictive Maintenance To Boost IC Manufacturing Efficiency


Predicting exactly how and when a process tool is going to fail is a complex task, but it's getting a tad easier with the rollout of smart sensors, standard interfaces, and advanced data analytics. The potential benefits of predictive maintenance are enormous. Higher tool uptime correlates with greater fab efficiency and lower operating costs, so engineers are pursuing multiple routes to boo... » read more

Chip Industry Week In Review


Synopsys refocused its security priorities around chips, striking a deal to sell off its Software Integrity Group subsidiary to private equity firms Clearlake Capital Group and Francisco Partners for about $2.1 billion. That deal comes on the heels of Synopsys' recent acquisition of Intrinsic ID, which develops physical unclonable function IP. Sassine Ghazi, Synopsys' president and CEO, said in... » read more

IC Test And Quality Requirements Drive New Collaboration


Rapidly increasing chip and package complexity, coupled with an incessant demand for more reliability, has triggered a frenzy of alliances and working relationships that are starting to redefine how chips are tested and monitored. At the core of this shift is a growing recognition that no company can do everything, and that to work together will require much tighter integration of flows, met... » read more

The Rising Price Of Power In Chips


Power is everything when it comes to processing and storing data, and much of it isn't good. Power-related issues, particularly heat, dominate chip and system designs today, and those issues are widening and multiplying. Transistor density has reached a point where these tiny digital switches are generating more heat than can be removed through traditional means. That may sound manageable e... » read more

AI/ML Challenges In Test and Metrology


The integration of artificial intelligence and machine learning (AI/ML) into semiconductor test and metrology is redefining the landscape for chip fabrication, which will be essential at advanced nodes and in increasingly dense advanced packages. Fabs today are inundated by vast amounts of data collected across multiple manufacturing processes, and AI/ML solutions are viewed as essential for... » read more

Strategies For Detecting Sources Of Silent Data Corruption


Engineering teams are wrestling with how to identify the root causes of silent data corruption (SDC) in a timely and cost-effective way, but the solutions are turning out to be broader and more complex than simply fixing a single defect. This is particularly vexing for data center reliability, accessibility and serviceability (RAS) engineering teams, because even the best tools and methodolo... » read more

Examining The Impact Of Chip Power Reduction On Data Center Economics


In the rapidly evolving landscape of data centers, optimizing energy consumption has become a critical focus. In this blog post, we'll delve into the intricacies of power consumption, exploring the economics of three key components: CPUs, GPUs, and AI accelerators, and how the implementation of proteanTecs power reduction solution transforms both power efficiency and computational capabilities... » read more

Application-Specific Power Performance Optimizer Based On Chip Telemetry


As datacenter power consumption continues to pose cooling and cost challenges, and battery driven devices are expected to last longer between charges, the search for advanced power management mechanisms continues. A modern design must balance between maximizing performance, consuming the least amount of power, and guaranteeing no failures in field. The latter requires safety margins which tr... » read more

Chip Industry Week In Review


By Adam Kovac, Karen Heyman, and Liz Allan. India approved the construction of two fabs and a packaging house, for a total investment of about $15.2 billion, according to multiple sources. One fab will be jointly owned by Tata and Taiwan's Powerchip. The second fab will be a joint investment between CG Power, Japan's Renesas Electronics, and Thailand's Stars Microelectronics. Tata will run t... » read more

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