The Week In Review: Feb. 25


By Mark LaPedus Is China set to bail out a U.S. government technology darling? Two Chinese automotive companies, Geely and Dongfeng Motor, are reported to have bid between $200 million and $350 million for a majority stake in Fisker, the maker of plug-in hybrid cars. If that happens Fisker—which has $192 million in U.S. federal government loan guarantees—could be headed to China, according... » read more

Smartphones Dial Up New RF Processes


By Mark LaPedus The rapid shift towards smartphones and tablets is driving the need for new and low-power chips at finer geometries. Today, the latest application processors, integrated basebands and other digital cell-phone chips are 28nm planar devices. And it won’t be long before OEMs incorporate 20nm planar and finFET devices in their systems as a means to reduce power and extend batt... » read more

Cellular Stranglehold?


Do you ever feel like you are completely at the mercy of your cellular service provider? Yeah, me too. Not only did I have to change providers when I relocated, I had to buy a new phone of course. Since my old phone and my new phone were both iPhones, I thought for sure I could use the same car charger….but no dice. This fact has bothered me for quite some time because it made no sense to ... » read more

Moore’s Law Revisited


It’s no surprise that Moore’s Law can continue for many more generations. Intel’s road map already extends down to 5nm, most likely with carbon nanotube FETs, tunnel FETs, graphene TSVs and maybe even fully depleted SOI to replace bulk CMOS. The rest of the industry has been hanging back a node or two, gliding on the coattails of what Intel and companies like IBM, Samsung and STMicroel... » read more

Experts at the Table: Stacking the Deck


By Ann Steffora Mutschler System-Level Design sat down to discuss challenges to 3D-IC adoption with Samta Bansal, product marketing for applied silicon realization in strategy and market development at Cadence; Carey Robertson, product marketing director at Mentor Graphics; Karthik Chandrasekar, member of technical staff in IC Design at Altera; and Herb Reiter, president of EDA2ASIC Consulting... » read more

Being Different Is Bad


By Ann Steffora Mutschler Today’s SoCs contain as much as 80% existing IP that either has been re-used from previous projects or obtained from a third party. Models are created of this hardware IP, as well as new portions of the design, in order to create a virtual prototype that allows the engineering team to see the complete system by running software and applications. While this a... » read more

G450C To Align Vendors During 450mm Transition


By David Lammers Innovation and synchronization among multiple companies do not often go hand in hand. But for the 450mm wafer transition to provide its full benefits, chip makers and their suppliers will need to do more than a simple wafer size scale up. That may lead the Global 450 Consortium (G450C) to serve as the proving ground for efforts to more closely match the electrical results o... » read more

The Rise Of The Power Architect


By Ann Steffora Mutschler Call them power czars, power gurus or power architects, this role within design teams is gaining importance with the need to understand, manage and control the power budget throughout the entire design process. As such, power architects are in high demand today with power architecture teams doubling in size within a year or two. Driving the need for this highly s... » read more

Firms Rethink Fabless-Foundry Model


By Mark LaPedus As chipmakers move toward 20nm designs, finFETs and 3D stacked devices, the industry is beginning to re-think the fabless-foundry model. Leading-edge foundries are finally getting serious about the “virtual IDM” model, in which vendors will act more like integrated device manufacturers (IDMs), as opposed to being mere production partners. In this model, the found... » read more

Increasing Certainty For 20nm Design


By Frank Schirrmeister At the recent Design Automation Conference two topics were getting very special attention: Design at 20nm and System-Level Design. This is very indicative of the very opposite trends we have been facing in semiconductor designs for the last couple of decades. On the one hand, the actual design units get smaller and smaller, and we are today happily designing for technolo... » read more

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