Chip Industry Week In Review


TSMC is expected to reduce its Fab 14 mature-node capacity by 15% to 20% to free up resources for its advanced packaging technologies, reports Counterpoint. The foundry will likely rely on its VIS affiliate site in Singapore (operational in late 2026) and other overseas fabs to ensure continued supply for older nodes. Memory The U.S. threatened 100% tariffs on South Korean memory compan... » read more

Chip Industry Week in Review


SIA's latest monthly global semiconductor sales report reflects a ~30% YOY increase, hitting a record $75.3B in November 2025. Asia Pacific had a notable 66% increase. Cadence launched its Chiplet Spec-to-Packaged Parts ecosystem to accelerate time to market for chiplet development for physical AI, data centers, and HPC applications. Initial IP partners joining Cadence include Arm, Arteris, ... » read more

Emergence Of The JJFET For Cryogenic and Quantum-Compatible Logic (Univ. of Glasgow)


A new technical paper titled "Silicon-based Josephson junction field-effect transistors enabling cryogenic logic and quantum technologies" was published by researchers at University of Glasgow. Abstract "The continuous miniaturisation of metal-oxide-semiconductor field-effect transistors (MOSFETs) from long- to short-channel architectures has advanced beyond the predictions of Moore's Law. ... » read more

Chip Industry Week In Review


Intel CEO Pat Gelsinger retired on Dec. 1, according to the company. He will be replaced by two interim co-CEOs, David Zinsner, who also continues to serve as CFO  and Michelle Johnston Holthaus, who has been named CEO of Intel Products. In addition, Frank Yeary was named interim executive chairman. Intel has been under pressure investors as non-traditional rivals, including Arm and NVIDIA, co... » read more

Chip Industry Week In Review


The U.S. Department of Commerce and Texas Instruments (TI) signed a non-binding preliminary memorandum of terms to provide up to $1.6 billion in CHIPS Act funding towards TI’s investment of over $18 billion for three 300mm semiconductor wafer fabs under construction in Texas and Utah. TI also expects to get about $6 billion to $8 billion from the U.S. Department of Treasury’s Investmen... » read more

Discrete Noise Approximation When Modeling The Effects Of Noise On Quantum Circuits


A technical paper titled “The Discrete Noise Approximation in Quantum Circuits” was published by researchers at HQS Quantum Simulations. Abstract: "When modeling the effects of noise on quantum circuits, one often makes the assumption that these effects can be accounted for by individual decoherence events following an otherwise noise-free gate. In this work, we address the validity of th... » read more

The Utility Of Shallow Dynamic Circuits For Long-Range Entanglement On Large-Scale Quantum Devices


A technical paper titled “Efficient Long-Range Entanglement using Dynamic Circuits” was published by researchers at IBM Research, IBM T.J. Watson Research Center, University of Southern California, MIT-IBM Watson AI Lab, and IBM Quantum. Abstract: "Quantum simulation traditionally relies on unitary dynamics, inherently imposing efficiency constraints on the generation of intricate entangl... » read more

HBM-based scalable multi-FPGA emulator for Quantum Fourier Transform (QFT)


New technical paper titled "A Scalable Emulator for Quantum Fourier Transform Using Multiple-FPGAs With High-Bandwidth-Memory" from researchers at Tohoku University in Japan. Abstract: "Quantum computing is regarded as the future of computing that hopefully provides exponentially large processing power compared to the conventional digital computing. However, current quantum computers do not... » read more

Do Superconducting Processors Really Need Cryogenic Memories? The Case For Cold DRAM


Cryogenic, superconducting digital processors offer the promise of greatly reduced operating power for server-class computing systems. This is due to the exceptionally low energy per operation of Single Flux Quantum circuits built from Josephson junction devices operating at the temperature of 4 Kelvin. Unfortunately, no suitable same-temperature memory technology yet exists to complement thes... » read more

What’s Next For AI, Quantum Chips


Semiconductor Engineering sat down to discuss the latest R&D trends with Luc Van den hove, president and chief executive of Imec; Emmanuel Sabonnadière, chief executive of Leti; and An Chen, executive director for the Nanoelectronics Research Initiative at the Semiconductor Research Corp. (SRC). Chen is on assignment from IBM. What follows are excerpts of those conversations, which took pl... » read more

← Older posts