tag: Rambus

Blog Review: Sept. 23
By Jesse Allen - 23 Sep, 2020 - Comments: 0

Arm's Matthew Mattina introduces a method to reduce the cost of neural network inference by combining both low-precision representation and the complexity-reducing Winograd transform while maintaining accuracy. Cadence's Paul McLellan checks out some of the biggest machine learning systems from Nvidia, Google, and Cerebras that were presented at the recent Hot Chips. Mentor's Robin Bornof... » read more

RISC-V: What’s Missing And Who’s Competing
By Ed Sperling - 23 Sep, 2020 - Comments: 0

Part 2: Semiconductor Engineering sat down to discuss the business and technology landscape for RISC-V with Zdenek Prikryl, CTO of Codasip; Helena Handschuh, a Rambus Security Technologies fellow; Louie De Luna, director of marketing at Aldec; Shubhodeep Roy Choudhury, CEO of Valtrix Systems; and Bipul Talukdar, North America director of applications engineering at SmartDV. What follows are exc... » read more

Custom Designs, Custom Problems
By Ed Sperling - 16 Sep, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss power optimization with Oliver King, CTO at Moortec; João Geada, chief technologist at Ansys; Dino Toffolon, senior vice president of engineering at Synopsys; Bryan Bowyer, director of engineering at Mentor, a Siemens Business; Kiran Burli, senior director of marketing for Arm's Physical Design Group; Kam Kittrell, senior product management group d... » read more

Blog Review: Sept. 16
By Jesse Allen - 16 Sep, 2020 - Comments: 0

Cadence's Paul McLellan checks out what's new for TSMC's advanced packaging solutions and the ultra-low power, RF, eNVM, and CMOS image sensor specialty processes. Mentor's Ron Press points to an automated solution to measuring pattern value that provides a consistent, “apples to apples” assessment of patterns detecting defects based on the likelihood the physical defects occurring. S... » read more

Choosing The Right Hardware Root Of Trust
By Paul Karazuba - 14 Sep, 2020 - Comments: 0

A Root of Trust is broadly defined as the security foundation for a semiconductor or electronic system. Any secure function performed by the device or system relies in whole or in part on that Root of Trust. The Root of Trust typically handles chip and device identities, cryptographic functions, stores and manages cryptographic keys, and handles one or more secure processes that provides the fo... » read more

Week In Review: Design, Low Power
By Jesse Allen - 11 Sep, 2020 - Comments: 0

Silvaco acquired the assets of Coupling Wave Solutions (CWS), including IP, patents, and analysis technologies. CWS provides tools for system-level interference analysis of complex SoCs that integrate analog, RF, and digital blocks. Silvaco said that the acquisition expands the company’s portfolio to address RF SOI (Silicon on Insulator) substrate analysis to accurately model and simulate noi... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 11 Sep, 2020 - Comments: 0

Synopsys announced an electronic and photonic co-design platform for photonic integrated circuit (PIC) design, layout implementation, and verification. The OptoCompiler provides schematic-driven layout and advanced photonic layout synthesis in the same platform. AI Rambus says it clocked 4.0 Gbps on its HBM2E memory interface (PHY and controller), which is a desirable speed for AI/ML traini... » read more

PCIe 5.0: A Key Interface Solution For The Evolving Data Center
By Vinitha Seevaratnam - 10 Sep, 2020 - Comments: 0

A great many developments are shaping the evolution of the data center. Enterprise workloads are increasingly shifting to the cloud, whether these be hosted or colocation implementations. The nature of workload traffic is changing such that data centers are architected to manage greater east-west (within the data center) communication. New workloads, with AI/ML (artificial intelligence/machine ... » read more

Dealing With Device Aging At Advanced Nodes
By Ann Mutschler - 10 Sep, 2020 - Comments: 0

Premature aging of circuits is becoming troublesome at advanced nodes, where it increasingly is complicated by new market demands, more stress from heat, and tighter tolerances due to increased density and thinner dielectrics. In the past, aging and stress largely were separate challenges. Those lines are starting to blur for a number of reasons. Among them: In automotive, advanced-node... » read more

Blog Review: Sept. 9
By Jesse Allen - 09 Sep, 2020 - Comments: 0

Mentor's Jacob Wiltgen considers the recent advances in safety critical engineering and how automated the lifecycle can become, where tools form a set of checks and balances to ensure the accuracy of results. Cadence's Paul McLellan finds out what's new at TSMC, including a new R&D center, fab construction, capacity increases for existing nodes, and what the company sees for beyond its N... » read more

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