RowPress: Read-Disturb Phenomenon In DDR4 DRAM Chips


A technical paper titled "RowPress: Amplifying Read Disturbance in Modern DRAM Chips" was published by researchers at ETH Zürich. Abstract: "Memory isolation is critical for system reliability, security, and safety. Unfortunately, read disturbance can break memory isolation in modern DRAM chips. For example, RowHammer is a well-studied read-disturb phenomenon where repeatedly opening and clo... » read more

Mission-Critical Devices Drive System-Level Test Expansion


System-level testing is becoming essential for testing complex and increasingly heterogeneous chips, driven by rising demand for reliable parts in safety- and mission-critical applications. More and more chip manufacturers are jumping on the SLT bandwagon for high-volume manufacturing (HVM) of these devices. Unlike ATE and packaged device testing, SLT mimics actual semiconductor system opera... » read more

Changes In Memory Design


An explosion of data in automotive, cloud, and AI are altering the fundamentals of memory design. One size no longer fits all, as memory is used for a broader set of applications, from automotive and cloud to consumer devices. Anand Theruvengadam, director of product management at Synopsys, talks about the impact of big data applications on density, memory stacking, and growing concerns about r... » read more

CEO Outlook: Chiplets, Data Management, And Reliability


Semiconductor Engineering sat down to talk about changes in chip design with Joseph Sawicki, executive vice president for IC EDA at Siemens Digital Industries Software; John Kibarian, president and CEO of PDF Solutions; John Lee, general manager and vice president of Ansys' Semiconductor Business Unit; Niels Faché, vice president and general manager of PathWave Software Solutions at Keysight; ... » read more

4 Ways To Design More Reliable Automotive Electronics


From engine management systems (fuel injection rate, emissions control, cooling systems) and autonomous controls (lane, speed, park assist, adaptive cruise control) to infotainment systems and comfort systems (climate control, electronic seat adjustment, automatic wipers, etc.), the modern-day gas-powered and electric vehicles have more electronic devices than ever. Indeed, the microprocessors ... » read more

Data Analytics For The Chiplet Era


This article is based on a paper presented at SEMICON Japan 2022. Moore’s Law has provided the semiconductor industry’s marching orders for device advancement over the past five decades. Chipmakers were successful in continually finding ways to shrink the transistor, which enabled fitting more circuits into a smaller space while keeping costs down. Today, however, Moore’s Law is slowin... » read more

Recent Developments in Neuromorphic Computing, Focusing on Hardware Design and Reliability


A new technical paper titled "Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies" was published by researchers at Univ. Lyon, Ecole Centrale de Lyon, Univ. Grenoble Alpes, Hewlett Packard Labs, CEA-LETI, and Politecnico di Torino. Abstract "The field of neuromorphic computing has been rapidly evolving in recent years, with an incre... » read more

GaN Power Devices: Stability, Reliability and Robustness Issues


A technical paper titled "Stability, Reliability, and Robustness of GaN Power Devices: A Review" was published by researchers at Virginia Polytechnic Institute and State University, Johns Hopkins University Applied Physics Laboratory, and Kyushu University. "Gallium nitride (GaN) devices are revolutionarily advancing the efficiency, frequency, and form factor of power electronics. However, t... » read more

Designing For In-Circuit Monitors


In every application space the semiconductor ecosystem touches, in-circuit monitors and sensors are playing an increasing role in silicon lifecycle management and concepts around reliability and resiliency — both during design as well as in the field. The combination of true system-level design, in/on-chip monitors, and improved data analysis are expected to drastically improve reliability... » read more

Easy-To-Use Reliability Checks Throughout The Design Cycle From IP To Full-Chip Tapeout


By Hossam Sarhan and Alexandre Arriordaz With the increasing complexity of design layouts and shorter tapeout cycles, waiting until signoff verification is no longer practical for design teams. There is a constant push to shift targeted verification activities “left” to earlier stages in the design flow. Finding and eliminating selected errors earlier during design and implementation, wh... » read more

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