Designing For In-Circuit Monitors

By Ann Mutschler - 27 Apr, 2023 - Comments: 0

In every application space the semiconductor ecosystem touches, in-circuit monitors and sensors are playing an increasing role in silicon lifecycle management and concepts around reliability and resiliency — both during design as well as in the field. The combination of true system-level design, in/on-chip monitors, and improved data analysis are expected to drastically improve reliability... » read more

Easy-To-Use Reliability Checks Throughout The Design Cycle From IP To Full-Chip Tapeout

By Hossam Sarhan - 27 Apr, 2023 - Comments: 0

By Hossam Sarhan and Alexandre Arriordaz With the increasing complexity of design layouts and shorter tapeout cycles, waiting until signoff verification is no longer practical for design teams. There is a constant push to shift targeted verification activities “left” to earlier stages in the design flow. Finding and eliminating selected errors earlier during design and implementation, wh... » read more

Pre-Layout, Post-Layout Circuit Reliability

By Siemens EDA - 26 Apr, 2023 - Comments: 0

With the increasing complexity of design layouts and shorter tapeout cycles, waiting until signoff verification to check design reliability is no longer practical for design teams. Designers must now apply reliability verification checks throughout the design flow, from intellectual property (IP) level to full-chip level, to ensure they meet tapeout schedules while confirming design reliability... » read more

State of the Art And Future Directions of Rowhammer (ETH Zurich)

By Technical Paper Link - 18 Apr, 2023 - Comments: 0

A new technical paper titled "Fundamentally Understanding and Solving RowHammer" was published by researchers at ETH Zurich. Abstract "We provide an overview of recent developments and future directions in the RowHammer vulnerability that plagues modern DRAM (Dynamic Random Memory Access) chips, which are used in almost all computing systems as main memory. RowHammer is the phenomenon in... » read more

How To Plan And Conduct Highly Accelerated Life Testing

By Chris South - 13 Apr, 2023 - Comments: 0

Assessing the robustness of an electronic product is integral to successful design and performance. Highly accelerated life testing (HALT) is an important testing tool for this purpose, and its effectiveness can be maximized through careful planning prior to setup and detailed execution. What is HALT? HALT is the process of applying increased stressors to an electronic device to force failure... » read more

What Data Center Chipmakers Can Learn From Automotive

By Anne Meixner - 11 Apr, 2023 - Comments: 2

Automotive OEMs are demanding their semiconductor suppliers achieve a nearly unmeasurable target of 10 defective parts per billion (DPPB). Whether this is realistic remains to be seen, but systems companies are looking to emulate that level of quality for their data center SoCs. Building to that quality level is more expensive up front, although ultimately it can save costs versus having to ... » read more

Impact Of Increased IC Performance On Memory

By Ed Sperling - 30 Mar, 2023 - Comments: 0

Increasing performance in advanced semiconductors is becoming more difficult as chips become more complex. There are more physical effects to contend with, different use cases, and challenges in making memory go faster. In addition, aging effects that once were ignored are now becoming critical concerns. Steven Woo, fellow and distinguished inventor at Rambus, talks about different factors that... » read more

Trusted Sensor Technology For The Internet Of Things

By Dirk Mayer - 27 Mar, 2023 - Comments: 0

“Data is the new oil” — Clive Humby, 2006 While this prediction relates to the value that can be generated from data, the focus here is on the tools at the oil well. Just as oil drilling platforms are expected to reliably produce crude oil around the clock, sensors are expected to reliably and continuously deliver high-quality data. But sensors have long since evolved from simple me... » read more

Solving The Reliability Problem Of Memristor-Based Artificial Neural Networks

By Technical Paper Link - 19 Mar, 2023 - Comments: 0

A technical paper titled "ReMeCo: Reliable Memristor-Based in-Memory Neuromorphic Computation" was published by researchers at Eindhoven University of Technology, University of Tehran, and USC. Abstract: "Memristor-based in-memory neuromorphic computing systems promise a highly efficient implementation of vector-matrix multiplications, commonly used in artificial neural networks (ANNs). H... » read more

Uneven Circuit Aging Becoming A Bigger Problem

By Ann Mutschler - 09 Mar, 2023 - Comments: 0

Circuit aging is emerging as a first-order design challenge as engineering teams look for new ways to improve reliability and ensure the functionality of chips throughout their expected lifetimes. The need for reliability is obvious in data centers and automobiles, where a chip failure could result in downtime or injury. It also is increasingly important in mobile and consumer electronics, w... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: reliability