tag: RISC-V

Formal Processor Model Providing Secure Speculation For The Constant-Time Policy
By Technical Paper Link - 24 Feb, 2023 - Comments: 0

A technical paper titled "ProSpeCT: Provably Secure Speculation for the Constant-Time Policy (Extended version)" was published by researchers at imec-DistriNet at KU Leuven, CEA, List, Université Paris Saclay and INRIA. Abstract: "We propose ProSpeCT, a generic formal processor model providing provably secure speculation for the constant-time policy. For constant-time programs under a no... » read more

Week In Review: Design, Low Power
By Susan Rambo - 24 Feb, 2023 - Comments: 0

Keysight Technologies acquired Cliosoft, add IP data management and design data to Keysight’s EDA portfolio. “The bigger vision is how we’re going to manage silicon lifecycle, from spec to tape-out. So you can have a data management and IP management layer and visibility into that data, and that ties into Keysight’s design and test software," said Simon Rance, vice president of marketi... » read more

Leveraging Chip Data To Improve Productivity
By Ann Mutschler - 23 Feb, 2023 - Comments: 1

The semiconductor ecosystem is scrambling to use data more effectively in order to increase the productivity of design teams, improve yield in the fab, and ultimately increase reliability of systems in the field. Data collection, analysis, and utilization is at the center of all these efforts and more. Data can be collected at every point in the design-through-manufacturing flow and into the f... » read more

Make The Right Choices For Enhanced Security On RISC-V
By David Marsden - 23 Feb, 2023 - Comments: 0

Two things are certain to make their presence felt at Embedded World 2023: the growing presence of RISC-V and the importance of safety and security in any embedded system. The breadth of RISC-V applications is expanding rapidly from IoT, mobile devices, to high performance computing, automotive and more. Its adoption, along with RISC-V International memberships, is also expanding from start... » read more

Efficient Verification Of RISC-V Processors
By Codasip - 22 Feb, 2023 - Comments: 0

For some time, application-specific instruction processors (ASIPs) have been developed for specialized applications. These have required multi-disciplinary teams with sufficient expertise to develop the instruction set, microarchitecture, and software toolchain. Few companies have had the right combination of skills to develop ASIPs so relatively few have been developed. With the advent of R... » read more

HW-SW Co-Design Solution For Building Side-Channel-Protected ML Hardware
By Technical Paper Link - 19 Feb, 2023 - Comments: 0

A technical paper titled "Hardware-Software Co-design for Side-Channel Protected Neural Network Inference" was published (preprint) by researchers at North Carolina State University and Intel. Abstract "Physical side-channel attacks are a major threat to stealing confidential data from devices. There has been a recent surge in such attacks on edge machine learning (ML) hardware to extract the... » read more

Week In Review: Design, Low Power
By Linda Christensen - 17 Feb, 2023 - Comments: 0

It’s earnings season. Arm, Cadence, Synopsys, Siemens (consolidated), Rambus, and Renesas reported quarterly results over the past couple weeks. All posted year-over-year revenue growth, despite an overall challenging macroeconomic climate. A roundup of all the chip industry earnings reports from the past several weeks can be found here. The edge computing market is projected to jump to al... » read more

Is RISC-V Ready For Supercomputing?
By Brian Bailey - 09 Feb, 2023 - Comments: 0

RISC-V processors, which until several years ago were considered auxiliary processors for specific functions, appear to be garnering support for an entirely different type of role — high-performance computing. This is still at the discussion stage. Questions remain about the software ecosystem, or whether the chips, boards, and systems are reliable enough. And there are both business and t... » read more

Hardware Virtualization Support in the RISC-V CVA6 Core
By Technical Paper Link - 08 Feb, 2023 - Comments: 0

A new technical paper titled "CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration" was written by researchers at Universidade do Minho (Portugal), University of Bologna, and ETH Zurich. Abstract Excerpt: "In this article, we describe our work on hardware virtualization support in the RISC-V CVA6 core. Our contribution is multifold and encompasses archite... » read more

Detecting Hardware Trojans In a RISC-V Core’s Post-Layout Phase
By Technical Paper Link - 08 Feb, 2023 - Comments: 0

A new technical paper "Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - A RISC-V Case Study" was published by researchers at University of Bremen, DFKI GmbH, and the German Aerospace Center. Abstract: "With the exponential increase in the popularity of the RISC-V ecosystem, the security of this platform must be re-evaluated especially for mission-critical and IoT d... » read more

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