How Far Will Copper Interconnects Scale?

By Laura Peters - 15 Dec, 2022 - Comments: 0

As leading chipmakers continue to scale finFETs — and soon nanosheet transistors — to ever-tighter pitches, the smallest metal lines eventually will become untenable using copper with its liner and barrier metals. What comes next, and when, is still to be determined. There are multiple options being explored, each with its own set of tradeoffs. Ever since IBM introduced the industry to c... » read more

Extending Copper Interconnects To 2nm

By Laura Peters - 17 Mar, 2022 - Comments: 0

Transistor scaling is reaching a tipping point at 3nm, where nanosheet FETs will likely replace finFETs to meet performance, power, area, and cost (PPAC) goals. A significant architectural change is similarly being evaluated for copper interconnects at 2nm, a move that would reconfigure the way power is delivered to transistors. This approach relies on so-called buried power rails (BPRs) and... » read more

Finding Defects In IC Packages

By Mark LaPedus - 17 Dec, 2019 - Comments: 0

Several equipment makers are ramping up new inspection equipment to address the growing defect challenges in IC packaging. At one time, finding defects in packaging was relatively straightforward. But as packaging becomes more complex, and as it is used in markets where reliability is critical, finding defects is both more difficult and more important. This has prompted the development of a ... » read more

Failure Analysis Of Electronic Devices Using Scanning Acoustic Microscopy

By Yavuz Kose - 11 Jun, 2019 - Comments: 0

Scanning acoustic microscopy, or SAM, is a non-destructive technique used in failure analysis of complex devices. SAM can provide a resolution down to sub-micron thicknesses. SAM is an efficient tool for analysis of adhesion between layers and presence of possible flaws in each layer. This can be used e.g. for investigations of sealing, coating, flip-chip underfills, BGA, QFN, wafer to wafer ... » read more

The Week in Review: IoT

By Jeff Dorsch - 16 Feb, 2018 - Comments: 0

Finance Cincinnati-based Losant, which offers an enterprise Internet of Things platform, reports raising $5.2 million in Series A funding led by CincyTech. The Rise of the Rest Seed Fund, TechNexus, and Vine Street Ventures also participated in the new round. Losant says customers for its scalable IoT platform include Bosch, Hewlett Packard Enterprise, and Verizon Communications. SAM of Tel... » read more

Knowledge Centers
Entities, people and technologies explored

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: SAM

How Far Will Copper Interconnects Scale?

Extending Copper Interconnects To 2nm

Finding Defects In IC Packages

Failure Analysis Of Electronic Devices Using Scanning Acoustic Microscopy

The Week in Review: IoT

Trending Articles

Hybrid Bonding Makes Strides Toward Manufacturability

Americas Chip Funding Energizes Industry

Advanced Packaging Driving New Collaboration Across Supply Chain

Chiplets Make Progress Using Interconnects As Glue

2D Semiconductors Make Progress, But So Does Silicon

Knowledge Centers
Entities, people and technologies explored