Manufacturing Bits: Nov. 2

By Mark LaPedus - 02 Nov, 2021 - Comments: 0

IRDS lithography roadmap The Journal of Micro/Nanopatterning, Materials, and Metrology (JM3) has published a paper that outlines the lithography roadmap and the various challenges for the next 15 years. The paper, called the "International Roadmap for Devices and Systems lithography roadmap," projects that extreme ultraviolet (EUV) lithography and a next-generation version will remain the m... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 29 Oct, 2021 - Comments: 0

Chipmakers After years in the works, GlobalFoundries is finally a public company. But on its first day of trading on Thursday (Oct. 28), shares of the foundry vendor slipped a bit. GF finished its first day of trading at $46.40. This compares to the $47 per share it priced in the initial public offering (IPO), according a report to Reuters. The chipmaker has a market capitalization of about $2... » read more

Manufacturing Bits: Oct. 26

By Mark LaPedus - 26 Oct, 2021 - Comments: 0

GaN finFETs, scaling GaN At the upcoming IEEE International Electron Devices Meeting (IEDM) in San Francisco, a slew of entities will present papers on the latest technologies in R&D. The event, to be held Dec. 11–15, involve papers on advanced packaging, CMOS image sensors, interconnects, transistors, power devices and other technologies. At IEDM, Intel will present a paper on a GaN-... » read more

Scaling Bump Pitches In Advanced Packaging

By Mark LaPedus - 25 Oct, 2021 - Comments: 0

Interconnects for advanced packaging are at a crossroads as an assortment of new package types are pushing further into the mainstream, with some vendors opting to extend the traditional bump approaches while others roll out new ones to replace them. The goal in all cases is to ensure signal integrity between components in IC packages as the volume of data being processed increases. But as d... » read more

Gearing Up For High-NA EUV

By Mark LaPedus - 21 Oct, 2021 - Comments: 2

The semiconductor industry is moving full speed ahead to develop high-NA EUV, but bringing up this next generation lithography system and the associated infrastructure remains a monumental and expensive task. ASML has been developing its high-numerical aperture (high-NA) EUV lithography line for some time. Basically, high-NA EUV scanners are the follow-on to today’s EUV lithography systems... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 15 Oct, 2021 - Comments: 0

Chipmakers TSMC posted its results for the quarter and confirmed its long-awaited plans to build a fab in Japan. It’s not a leading-edge fab, but rather a plant for 28nm/22nm processes. “The company confirmed plans to build a new fab in Japan for 22nm + 28nm,” said Aaron Rakers, an analyst at Wells Fargo, in a research note. “An average 22/28nm fab costs ~$4-5B range per 45k wspm. Fab ... » read more

Week In Review: Design, Low Power

By Jesse Allen - 15 Oct, 2021 - Comments: 0

Nvidia acquired Oski Technology. Oski provides formal verification methodologies and consulting services, and Nvidia said that the acquisition will allow it to increase its investment in formal verification strategies. Oski's Gurugram, India, design center will become Nvidia's fourth engineering office in the country. Based in San Jose, Calif., it was founded in 2005. Terms of the deal were not... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 08 Oct, 2021 - Comments: 0

Government policy Hoping to resolve the ongoing worldwide chip shortage situation, the U.S. Department of Commerce late last month launched a “request for information (RFI)” initiative, which involved sending questionnaires to various semiconductor companies. The U.S. government is asking all parts of the supply chain – producers, consumers, and intermediaries – to voluntarily share in... » read more

Data Tsunami Pushes Boundaries Of IC Interconnects

By Ann Mutschler - 22 Sep, 2021 - Comments: 0

Rapid increases in machine-generated data are fueling demand for higher-performance multi-core computing, forcing design teams to rethink the movement of data on-chip, off-chip, and between chips in a package. In the past, this was largely handled by the on-chip interconnects, which often were a secondary consideration in the design. But with the rising volumes of data in markets ranging fro... » read more

System-In-Package Thrives In The Shadows

By Mark LaPedus - 16 Sep, 2021 - Comments: 0

IC packaging continues to play a big role in the development of new electronic products, particularly with system-in-package (SiP), a successful approach that continues to gain momentum — but mostly under the radar because it adds a competitive edge. With a SiP, several chips and other components are integrated into a package, enabling it to function as an electronic system or sub-system. ... » read more

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tag: Samsung

Manufacturing Bits: Nov. 2

Week In Review: Manufacturing, Test

Manufacturing Bits: Oct. 26

Scaling Bump Pitches In Advanced Packaging

Gearing Up For High-NA EUV

Week In Review: Manufacturing, Test

Week In Review: Design, Low Power

Week In Review: Manufacturing, Test

Data Tsunami Pushes Boundaries Of IC Interconnects

System-In-Package Thrives In The Shadows