tag: scaling

More Knobs, Fewer Markers
By Ed Sperling - 16 Jan, 2020 - Comments: 0

The next big thing in chip design may be really big — the price tag. In the past, when things got smaller, so did the cost per transistor. Now they are getting more expensive to design and manufacture, and the cost per transistor is going up along with the number of transistors per area of die, and in many cases even the size of the die. That's not exactly a winning economic formula, which... » read more

New Packaging Roadmap
By Katherine Derbyshire - 17 Dec, 2019 - Comments: 3

Historically, the electronics industry has drawn sharp distinctions between the integrated circuit chip, the package that protects it from the environment, and the board that connects it to other devices in a complete system. The circuit and systems worlds have been largely isolated from each other, using different tools, different processes, and different metrics for success. While integrated ... » read more

A New Playbook For The AI Era
By Ellie Yieh - 21 Nov, 2019 - Comments: 0

It’s Q4 in Silicon Valley, which means that most tech enterprises are in strategic planning mode, taking stock of where they are today and charting a course for where they want to be over the next few years. This year’s Q4 planning cycle needs to be a little different: the opportunities before us are an order of magnitude larger. So are the challenges. To get to where we need to be, our�... » read more

Scaling Up And Down
By Nerissa Draeger - 21 Oct, 2019 - Comments: 1

You don’t have to look very far in the semiconductor world before you see the word “scaling.” Perhaps you read an industry news article headline about transistor scaling – how those nearly nanoscale components are shrinking even smaller in size down to the atomic scale. Or maybe you heard a reference to memory capacity scaling – how our favorite mobile devices can store more high-reso... » read more

Chiplets, Faster Interconnects, More Efficiency
By Ed Sperling - 22 Aug, 2019 - Comments: 1

Big chipmakers are turning to architectural improvements such as chiplets, faster throughput both on-chip and off-chip, and concentrating more work per operation or cycle, in order to ramp up processing speeds and efficiency. Taken as a whole, this represents a significant shift in direction for the major chip companies. All of them are wrestling with massive increases in processing demands ... » read more

Speed Returns As The Key Metric
By Ed Sperling - 08 Aug, 2019 - Comments: 0

For the foreseeable future, it's all about performance. For the past decade or so, power and battery life have been the defining characteristics of chip design. Performance was second to those. This was particularly important in smart phones and wearable devices, where time between charges was a key selling point. In fact, power-hungry processors killed the first round of smart watches. But ... » read more

Adaptation In A Volatile Era
By Thomas Caulfield - 24 Jan, 2019 - Comments: 0

2018 has been a volatile year by almost any measure, and the global electronics industry was at the center of the action. Soaring memory prices and tech stock valuations drove eye-popping growth in the first half, with Samsung solidifying its position as the world’s largest chipmaker and Apple briefly topping $1 trillion of market capitalization. Fast forward to the second half of the year an... » read more

Hybrid Memory
By Ed Sperling - 13 Sep, 2018 - Comments: 0

Gary Bronner, senior vice president of Rambus Labs, talks about the future of DRAM scaling, why one type of memory won’t solve all needs, and what the pros and cons are of different memories. https://youtu.be/R0hhDx2Fb7Q » read more

More Performance At The Edge
By Ed Sperling - 09 Aug, 2018 - Comments: 0

Shrinking features has been a relatively inexpensive way to improve performance and, at least for the past few decades, to lower power. While device scaling will continue all the way to 3nm and maybe even further, it will happen at a slower pace. Alongside of that scaling, though, there are different approaches on tap to ratchet up performance even with chips developed at older nodes. This i... » read more

Multiphysics Challenges For EDA Tools
By Christoph Sohrmann - 10 May, 2018 - Comments: 0

Cost and performance are the main drivers for scaling of integrated circuits. However, some applications do not scale as easily as others. This is particularly true for analog circuits and everything related to high voltage and high power. Still, the demand for these kind of applications is growing rapidly due to new emerging markets such as Industry 4.0, IoT, and e-mobility. In the automoti... » read more

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