tag: Si2

Is The Stacked Die Ecosystem Stagnating?
By Ann Mutschler - 23 Dec, 2014 - Comments: 0

While the stacked die ecosystem in general is currently status quo, with not much happening in the past year, there is definitely work being done —albeit cautiously—on the design tools side of things. It would be easy to feel impatient that the design tools are not complete and available today for [getkc id="82" comment="2.5D"] and [getkc id="42" comment="3D IC"] implementation until hearin... » read more

Industry Scorecard For 2014
By Brian Bailey - 18 Dec, 2014 - Comments: 0

At the end of last year, Semiconductor Engineering asked the industry about the developments they expected to see in 2014. If you care to refresh your memory, they were categorized under markets, semiconductors and development tools. Now it is time to look back and see how accurate those predictions were and where they fell short. Markets The obvious trend, at the beginning of the year, wa... » read more

See The Internet Of Things…In 3D
By Steve Schulz - 05 Dec, 2014 - Comments: 0

No, you don’t need 3D glasses to experience two of the hottest emerging technology trends in electronics — just take advantage of the longest running conference series on the topic of 3-D integrated circuits. Now in its 11th year, the 3D Architectures for Semiconductor Integration and Packaging conference will take place in San Francisco next week. The event will feature two pre-conference ... » read more

The Internet Of Cores
By Brian Bailey - 20 Nov, 2014 - Comments: 0

Ever since the birth of the third-party [getkc id="43" comment="IP"] market, there has been a desire for plug-and-play compatibility between cores. Part of the value proposition of reuse is that a block has been used before, and has been verified and validated by having been implemented in silicon. By re-using the core, many of these tasks no longer land on the [getkc id="81" kc_name="SoC"] dev... » read more

The Week In Review: Design
By Ed Sperling - 24 Oct, 2014 - Comments: 0

IP Cadence rolled out a portfolio of stacked die memory verification IP to support Wide I/O-2, Hybrid Memory Cube, high-bandwidth memory, and DDR4-3DS. Included are direct memory access for read, write, save, preload and comparison of memory contents, assertions, error configurability, and a built-in address manager. ARM rolled out additions to its enterprise-class SoC interconnects for qua... » read more

Energy Boost For Power Standards
By Brian Bailey - 09 Oct, 2014 - Comments: 0

If the amount of standards work and industry effort that is being expended on a given topic is any indicator of the growing importance of a design concern, then power has most certainly become the hottest topic in the industry. Thankfully, it seems as if everyone has learned their lessons from the CPF/[gettech id="31044" t_name="UPF"] struggles and is attempting to coordinate activities, while ... » read more

Why Multi-Die Integration Really Is On Its Way
By Steve Schulz - 19 Sep, 2014 - Comments: 0

Admit it. You’ve heard a lot about 3D IC’s for years now, and it’s starting to get old. Lots of talk but not much action, you say? Maybe it will never happen, you say? Well, perhaps it’s time to reassess the current situation, reevaluate emerging needs, and reset our “3D” paradigm for the coming multi-die imperative. The problems associated with 3D IC (stacked die) are real and v... » read more

Different Approaches Emerge For Stacking Die
By Ed Sperling - 21 Aug, 2014 - Comments: 1

The concept of stacking die to shorten wires, improve performance, and reduce the amount of energy required to drive signals has been in research for at least the past dozen years at both IBM and Intel. And depending upon whom you ask, it could be another 2 to 10 years before it becomes a mainstream packaging approach—if it happens at all. At least part of the confusion stems from how you ... » read more

Raising The Abstraction Of Power: Trends
By Ann Mutschler - 10 Jul, 2014 - Comments: 0

Given that design requirements for today’s SoCs go well beyond performance and area, energy efficiency and its impact on system design plays a major role for many end applications ranging from wireless sensor networks to autonomous vehicles as well as emerging applications in the Internet of Things market segment, where cooling capability is limited and expensive. For these reasons, a comp... » read more

ST Announces 20x Savings Using OpenPDK At DAC
By Steve Schulz - 02 Jul, 2014 - Comments: 0

Last month’s Design Automation Conference in San Francisco proved to be highly successful for Si2. This year, for example, Si2 organized 28 member-led presentations, issued 10 press releases, and hosted 5 special events. Today I will focus on one of those events, a special press conference featuring Philippe Magarshack, executive vice president for design enablement services at STMicroelectro... » read more

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