tag: Siemens EDA

Blog Review: Feb. 19
By Jesse Allen - 19 Feb, 2025 - Comments: 0

Cadence's Ravi Vora explains the AMBA Local Translation Interface protocol, which defines the point-to-point protocol between an I/O device and the Translation Buffer Unit of an Arm System Memory Management Unit. Siemens' Stephen V. Chavez provides a checklist for ensuring the quality and functionality of a PCB at every stage, from design through fabrication, assembly, and testing, with a fo... » read more

Controlling Leakage Power
By Matthew Hogan - 17 Feb, 2025 - Comments: 0

IC designers face a significant challenge in managing leakage power - a phenomenon that can profoundly impact your device's power, performance, area (PPA), and overall reliability. Leakage can occur in various ways, from parasitic leakage to analog gate leakage or digital gate leakage, and you must address these issues with great care, as even subtle circuit changes can lead to reliability prob... » read more

ADAS Adds Complexity To Automotive Sensor Fusion
By Ann Mutschler - 17 Feb, 2025 - Comments: 0

Sensor fusion is becoming increasingly popular and more complex in automotive designs, integrating multiple types of sensors into a single chip or package and intelligently routing data to wherever it is needed. The primary goal is to bring together information from cameras, radar, lidar, and other sensors in order to provide a detailed view of what's happening inside and outside of a vehicl... » read more

Signal Integrity Plays Increasingly Critical Role In Chiplet Design
By Ann Mutschler - 13 Feb, 2025 - Comments: 1

Maintaining the quality and reliability of electrical signals as they travel through interconnects is proving to be much more challenging with chiplets and advanced packaging than in monolithic SoCs and PCBs. Signal integrity is a fundamental requirement for all chips and systems, but it becomes more difficult with chiplets due to reflections, loss, crosstalk, process variation, and various ... » read more

Normalization Keeps AI Numbers In Check
By Bryon Moyer - 13 Feb, 2025 - Comments: 0

AI training and inference are all about running data through models — typically to make some kind of decision. But the paths that the calculations take aren’t always straightforward, and as a model processes its inputs, those calculations may go astray. Normalization is a process that can keep data in bounds, improving both training and inference. Foregoing normalization can result in at... » read more

Beyond Simulation: Transforming Early IC Design With Insight Analyzer
By Siemens EDA - 13 Feb, 2025 - Comments: 0

Traditional verification methods are proving inadequate for addressing critical reliability challenges in today's increasingly complex integrated circuit (IC) designs. Modern IC design requires a proactive approach to verification that emphasizes early-stage analysis. The shift-left methodology enables earlier identification of potential design risks, addressing the complex challenges of IP blo... » read more

What Exactly Is Multi-Physics?
By Brian Bailey - 13 Feb, 2025 - Comments: 0

Multi-physics is the new buzzword in semiconductor design and analysis, but the fuzziness of the term is a reflection of just how many new and existing problems need to be addressed simultaneously in the design flow with advanced nodes and packaging. This disaggregation of planar SoCs and the inclusion of more processing elements, memories, interconnects, and passives inside a package has cr... » read more

Optimizing DFT With AI And BiST
By Gregory Haley - 12 Feb, 2025 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to explore how AI impacts design for testability, with Jeorge Hurtarte, senior director of product marketing in the Semiconductor Test Group at Teradyne; Sri Ganta, director of test products at Synopsys; Dave Armstrong, principal test strategist at Advantest; and Lee Harrison, director of Tessent automotive IC solutions at Siemens EDA. Wh... » read more

Silent Data Errors Still Slipping Through The Cracks
By Laura Peters - 11 Feb, 2025 - Comments: 0

Silent data corruption errors in large server farms have become a major concern of cloud users, hyperscalers, processor manufacturers and the test community. Silent data errors (also called silent data corruption errors) are hardware errors that occur when an incorrect computational result from a processor core goes undetected by the system. The data is silently corrupted because neither sof... » read more

Simulation Closes Gap Between Chip Design Optimization And Manufacturability
By Gregory Haley - 11 Feb, 2025 - Comments: 0

Simulation is playing an increasingly critical and central role throughout the design-through-manufacturing flow, fusing together everything from design to manufacturing and test in order to reduce the number and cost of silicon respins. The sheer density of modern chips, combined with advanced packaging techniques like 3D stacking and heterogeneous integration, has made iterative physical p... » read more

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