Are FPGAs More Secure Than Processors?


Security concerns often focus on software being executed on processors. But not all electronic functionality runs in software. FPGAs provide another way to do work, and they can be more secure than functions executed in software. FPGAs provide more control of hardware and are more opaque to attackers. In the case of embedded FPGAs, the designer is in complete control of the entire system. Th... » read more

The Advantages Of MBSE-Driven E/E Architecture


Vehicles in all sectors are growing in complexity as OEMs develop sophisticated platforms with growing levels of automation and connectivity. To cope with this growing complexity, automotive, aerospace and commercial vehicle OEMs must evolve their architectural design processes to leverage MBSE and the digital thread. Today’s E/E system engineering solutions help companies implement MBSE by p... » read more

Blog Review: Oct. 7


In a blog for Arm, University of Southampton PhD student Sivert Sliper looks at how energy-driven and intermittent computing could be used to power trillions of IoT devices and introduces a SystemC-based simulator for such systems. Mentor's Chris Spear explains why transaction classes should extend from uvm_sequence_item rather than uvm_transaction when designing UVM testbenches. Cadence'... » read more

Good Vs. Bad Acquisitions


M&A activity is beginning to heat up across the semiconductor industry, fueled by high market caps, low interest rates, and a slew of startups with innovative technology and limited market reach. Some of these deals are gigantic, such as the pending acquisition of Arm by Nvidia, and the proposed purchase of Maxim Integrated by Analog Devices. Others are more modest, such as Arteris IP's ... » read more

EDA, IP Show Surprising Strength


EDA and IP revenue surged 12.6% in Q2 to $2.78 billion, up from $2.47 billion in the same period in 2019, according to a just-released report. That growth occurred in all regions, as well. What's surprising about the report is just how strong sales were in the midst of the COVID-19 pandemic. "Revenue was up strongly from Q1, and there was enormous growth," said Wally Rhines, executive spo... » read more

System-Level Packaging Tradeoffs


Leading-edge applications such as artificial intelligence, machine learning, automotive, and 5G, all require high bandwidth, higher performance, lower power and lower latency. They also need to do this for the same or less money. The solution may be disaggregating the SoC onto multiple die in a package, bringing memory closer to processing elements and delivering faster turnaround time. But ... » read more

Blog Review: Sept. 30


Synopsys' Fred Bals takes a look open source projects that, while popular, go understaffed or underfunded, how that can lead to potential security vulnerabilities, and why users who rely on them should consider stepping up to contribute. In a video, Mentor's Colin Walls explains the basic concepts of multicore systems as it relates to embedded programming. Cadence's Paul McLellan ponders ... » read more

Deals That Change The Chip Industry


Nvidia's pending $40 billion acquisition of Arm is expected to have a big impact on the chip world, but it will take years before the effects of this deal are fully understood. More such deals are expected over the next couple of years due to several factors — there is a fresh supply of startups with innovative technology, interest rates are low, and market caps and stock prices of buyers ... » read more

Week In Review: Design, Low Power


Tools & IP Arm added two new platforms to its product roadmap: the Neoverse V1, and the Neoverse N2, the second-generation N-series platform. The V1 platform supports Scalable Vector Extensions (SVE), provides 50% better single-threaded performance over N1, and targets high-performance cloud, HPC, and machine learning applications. The N2 provides 40% higher single-threaded performance com... » read more

Innovative Strategies Are Improving Early Design Circuit Verification


Layout vs. schematic (LVS) circuit verification is an essential stage in the integrated circuit (IC) design verification cycle. However, given today’s large design sizes, numerous hierarchies, and complex foundry decks, meeting planned tapeout deadlines in the quickest turnaround time (TAT) can be difficult. In an effort to minimize TAT, most design teams now use parallelized design flows, wh... » read more

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