Signal Integrity Plays Increasingly Critical Role In Chiplet Design


Maintaining the quality and reliability of electrical signals as they travel through interconnects is proving to be much more challenging with chiplets and advanced packaging than in monolithic SoCs and PCBs. Signal integrity is a fundamental requirement for all chips and systems, but it becomes more difficult with chiplets due to reflections, loss, crosstalk, process variation, and various ... » read more

Beyond Simulation: Transforming Early IC Design With Insight Analyzer


Traditional verification methods are proving inadequate for addressing critical reliability challenges in today's increasingly complex integrated circuit (IC) designs. Modern IC design requires a proactive approach to verification that emphasizes early-stage analysis. The shift-left methodology enables earlier identification of potential design risks, addressing the complex challenges of IP blo... » read more

Simulation Study Of Vertically Stacked 2D NSFETs


A new technical paper titled "Simulation of Vertically Stacked 2-D Nanosheet FETs" was published by researchers at Università di Pisa and TU Wien. Abstract "We present a simulation study of vertically stacked 2-D nanosheet field-effect transistors (NSFETs). The aim of this investigation is to assess the performance and potential of FinFET alternatives, i.e., gate-all-around (GAA) nanosheet... » read more

Simulation Closes Gap Between Chip Design Optimization And Manufacturability


Simulation is playing an increasingly critical and central role throughout the design-through-manufacturing flow, fusing together everything from design to manufacturing and test in order to reduce the number and cost of silicon respins. The sheer density of modern chips, combined with advanced packaging techniques like 3D stacking and heterogeneous integration, has made iterative physical p... » read more

Beyond Simulation: Transforming Early IC Design With Insight Analyzer


Traditional verification methods are proving inadequate for addressing critical reliability challenges in today's increasingly complex integrated circuit (IC) designs. Modern IC design requires a proactive approach to verification that emphasizes early-stage analysis. The shift-left methodology enables earlier identification of potential design risks, addressing the complex challenges of IP blo... » read more

How Engineering Simulation Drives Impact for Sustainability


For decades, engineering simulation has been the engineer’s Swiss Army knife for improving the speed and cost of developing new products as well as for bringing product performance to the next level. This report reveals that while simulation has already made a significant contribution to advancing sustainability, there is still so much potential to make an even greater impact. In the conte... » read more

TCAD Simulation Challenges For Gate-All-Around Transistors


By Victor Moroz and Shela Aboud The transition from finFET technology to Gate-All-Around (GAA) technology helps to reduce transistor variability and resume channel length scaling. It also brings several new challenges in terms of transistor design that need to be addressed. One of the challenges is handling the thin Si layers that come with GAA technology, where Si channel thickness scale... » read more

Automotive Design: How AI Is Transforming The Art Of Simulation


The automotive sector is about to experience a major wave of innovation as artificial intelligence (AI) is applied to design simulation, according to experts. The technology makes it possible to reduce the time needed to run the analyses for crash-test simulations — one of the most data-heavy exercises in automotive design — from several days to minutes. Read more here to learn about a p... » read more

Simulating Multiple DSPs As Multiple x86 Processes


An increasing number of embedded designs are multi-core systems. At the pre-silicon stage, customers use a simulation platform for architectural exploration and software development. Architects want to quantify the impact of the number of cores, local memory size, system memory latency, and interconnect bandwidth. Software teams wish to have a practical development platform that is not excrucia... » read more

Accelerating Verification Of Computational Storage Designs Using Avery NVMe Verification IP


Computational storage is an emerging paradigm that integrates processing capabilities directly within storage devices. This paper outlines how this approach addresses the limitations of traditional NVM Express (NVMe) SSDs and the performance characteristics of the newly introduced compute and subsystem local memory (SLM) namespaces. The paper also focuses on the verification framework provided ... » read more

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