tag: simulation

AI-Driven Verification Regression Management
By Paul Carzola - 24 Apr, 2025 - Comments: 0

By Paul Carzola and Taruna Reddy Coping with the endless growth in chip size and complexity requires innovative electronic design automation (EDA) solutions at every stage of the development process. Better algorithms, increased parallelism, higher levels of abstraction, execution on graphics processing units (GPUs), and use of AI and machine learning (ML) all contribute to these solutions. ... » read more

Advanced Atomistic Simulation Techniques For Atomic Layer Etching
By Synopsys - 17 Apr, 2025 - Comments: 0

Continuous downscaling of the critical dimensions in semiconductor devices is the cornerstone of technological revolution. As the technology nodes keep shrinking, innovations in fabrication technologies are needed to continue the trend. We have arrived at the age where atomic level precision in the fabrication of semiconductor devices is needed to keep improving PPA. Thus, advanced film fabrica... » read more

Discovering Digital Twins: A Complete Guide
By Ansys - 09 Apr, 2025 - Comments: 0

As artificial intelligence (AI) and machine learning (ML) continue to revolutionize industries, their integration with simulation is amplifying the capabilities of digital twins. AI/ML, simulation, and reduced-order modeling (ROM) technologies combine to create hybrid digital twins—virtual replicas that blend data-driven insights with the accuracy of physics-based models. This powerful approa... » read more

High-Speed High-Capacity Mixed-Signal Simulation Of Silicon Photonics
By Paul Graykowski - 27 Mar, 2025 - Comments: 0

Many of today’s computing and communications applications demand almost unimaginable processing capability and high-bandwidth access to memory. For example, many data center systems using high-end Graphics Processing Units (GPUs) often need to transfer multiple terabytes per second. Traditional copper-based interconnects, limited to speeds of hundreds of megabits per second (Mbps), cannot ... » read more

Easier Assertion Development And Debug With Simulation Replay
By Vin Liao - 13 Mar, 2025 - Comments: 0

By Vin Liao and Robert Ruiz Assertions and assertion IP (AIP) are a core part of the register transfer level (RTL) verification environment for all modern chip development projects. Assertions can be considered as statements of design intent, specifying how the design should behave—and not behave—under specified conditions. They range from simple statements, for example, that a multi-bit... » read more

Signal Integrity Plays Increasingly Critical Role In Chiplet Design
By Ann Mutschler - 13 Feb, 2025 - Comments: 1

Maintaining the quality and reliability of electrical signals as they travel through interconnects is proving to be much more challenging with chiplets and advanced packaging than in monolithic SoCs and PCBs. Signal integrity is a fundamental requirement for all chips and systems, but it becomes more difficult with chiplets due to reflections, loss, crosstalk, process variation, and various ... » read more

Beyond Simulation: Transforming Early IC Design With Insight Analyzer
By Siemens EDA - 13 Feb, 2025 - Comments: 0

Traditional verification methods are proving inadequate for addressing critical reliability challenges in today's increasingly complex integrated circuit (IC) designs. Modern IC design requires a proactive approach to verification that emphasizes early-stage analysis. The shift-left methodology enables earlier identification of potential design risks, addressing the complex challenges of IP blo... » read more

Simulation Study Of Vertically Stacked 2D NSFETs
By Technical Paper Link - 12 Feb, 2025 - Comments: 0

A new technical paper titled "Simulation of Vertically Stacked 2-D Nanosheet FETs" was published by researchers at Università di Pisa and TU Wien. Abstract "We present a simulation study of vertically stacked 2-D nanosheet field-effect transistors (NSFETs). The aim of this investigation is to assess the performance and potential of FinFET alternatives, i.e., gate-all-around (GAA) nanosheet... » read more

Simulation Closes Gap Between Chip Design Optimization And Manufacturability
By Gregory Haley - 11 Feb, 2025 - Comments: 0

Simulation is playing an increasingly critical and central role throughout the design-through-manufacturing flow, fusing together everything from design to manufacturing and test in order to reduce the number and cost of silicon respins. The sheer density of modern chips, combined with advanced packaging techniques like 3D stacking and heterogeneous integration, has made iterative physical p... » read more

Beyond Simulation: Transforming Early IC Design With Insight Analyzer
By Siemens EDA - 06 Feb, 2025 - Comments: 0

Traditional verification methods are proving inadequate for addressing critical reliability challenges in today's increasingly complex integrated circuit (IC) designs. Modern IC design requires a proactive approach to verification that emphasizes early-stage analysis. The shift-left methodology enables earlier identification of potential design risks, addressing the complex challenges of IP blo... » read more

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