tag: simulation

Machine Learning Enabled High-Sigma Verification Of Memory Designs
By Nebabie Kebebew - 15 Oct, 2020 - Comments: 0

Emerging applications and the big data explosion have made memory IPs ubiquitous in modern-day electronics. Specifically, the demand for memories with low-die area, low voltage, high capacity, and high performance is rising for use by data center and cloud computing servers. This is essential to serve the exponentially growing connectivity boom and the latest emerging 5G based systems, includin... » read more

Simulate Automotive Radar In 5 Dimensions
By Ushemadzoro Chipengo - 15 Oct, 2020 - Comments: 0

Automotive radar has emerged as one of the backbone technologies in the automotive industry’s advanced driver assistance systems (ADAS) revolution. Because radar uses electromagnetic waves to sense the environment, it can operate over a long distance in poor visibility or inclement weather conditions. Designing automotive radar that accurately captures diverse traffic situations will be essen... » read more

Maximizing Ansys LS-DYNA Performance With AMD EPYC 7Fx2 Processors
By Ansys - 14 Oct, 2020 - Comments: 0

AMD EPYC 7Fx2 processors bring high frequencies and very highs ratios of cache per core to the 2nd Gen EPYC family of processors. EPYC 7Fx2 processors build on the large memory capacity, extreme memory bandwidth and massive I/O of the 2nd Gen EPYC family to deliver exceptional HPC workload performance. This paper describes the excellent performance of these chips in running Ansys LS-DYNA comput... » read more

Confusion Persists In Verification Terms
By Brian Bailey - 27 Aug, 2020 - Comments: 7

I find it amazing that an area of technology that attempts to show, beyond a reasonable doubt, that a design will work before it is constructed can be so bad at getting some basic things right. I am talking about verification terminology. I have been in this industry for over 40 years and it is not improving. In fact, it is getting worse. The number of calls I have with people where they hav... » read more

Preparing For A Barrage Of Physical Effects
By Ann Mutschler - 13 Aug, 2020 - Comments: 0

Advancements in 3D transistors and packaging continue to enable better power and performance in a given footprint, but they also require more attention to physical effects stemming from both increased density and vertical stacking. Even in planar chips developed at 3nm, it will be more difficult to build both thin and thick oxide devices, which will have an impact on everything from power to... » read more

Run Simulations at Top Speed
By Ansys - 12 Aug, 2020 - Comments: 0

The Ansys Fluent solver can be so computationally demanding that complex simulations can take hours to complete. Ansys and Intel worked together to build a new smoother and optimize it for Intel Xeon Scalable processors to help reduce those long simulation times. This whitepaper reviews the results of performance testing conducted with Ansys Fluent 2020 R1 when making use of the Intel MKL sp... » read more

Creating Better Models For Software And Hardware Verification
By Ed Sperling - 04 Aug, 2020 - Comments: 1

Semiconductor Engineering sat down to discuss what's ahead for verification with Daniel Schostak, Arm fellow and verification architect; Ty Garibay, vice president of hardware engineering at Mythic; Balachandran Rajendran, CTO at Dell EMC; Saad Godil, director of applied deep learning research at Nvidia; Nasr Ullah, senior director of performance architecture at SiFive. What follows are excerpt... » read more

Post Layout Simulation Is Becoming The Bottleneck For Analog Verification
By Greg Curtis - 25 Jun, 2020 - Comments: 0

My, have times changed. I remember when I first started out as a green analog designer right out of college, we would cut rubylith masking film on a large light table representing the different layers of our design to generate the design for manufacturing of the chip. We proactively worked to mitigate cross coupling of noise to our signal nets, but we were rarely concerned about interconnect re... » read more

Simplifying And Speeding Up Verification
By Ed Sperling - 16 Jun, 2020 - Comments: 1

Semiconductor Engineering sat down to discuss what's ahead for verification with Daniel Schostak, Arm fellow and verification architect; Ty Garibay, vice president of hardware engineering at Mythic; Balachandran Rajendran, CTO at Dell EMC; Saad Godil, director of applied deep learning research at Nvidia; Nasr Ullah, senior director of performance architecture at SiFive. What follows are excerpt... » read more

(Artificially) Intelligent Verification
By Brian Bailey - 01 Jun, 2020 - Comments: 1

Functional verification produces a lot of data, , but does that make it suitable for Artificial Intelligence (AI) or Machine Learning (ML)? Experts weigh in about where and how AI can help and what the industry could do to improve the benefits. "It's not necessarily the quantity," says Harry Foster, chief scientist for verification at Mentor, a Siemens Business. "It's the quality that matter... » read more

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