Demonstrating The Benefits Of Source-Mask Optimization And Enabling Technologies Through Experiment And Simulations


In recent years the potential of Source-Mask Optimization (SMO) as an enabling technology for 22nm-and-beyond lithography has been explored and documented in the literature. It has been shown that intensive optimization of the fundamental degrees of freedom in the optical system allows for the creation of non-intuitive solutions in both the mask and the source, which leads to improved lithograp... » read more

Emulation Uses Increase


For more than two decades, [getkc id="30" comment="emulation"] was a technology in search of a market. While on paper it has always made sense to speed up simulation, using hardware acceleration was so pricey that few companies could justify the cost. Fast-forward to today and emulation is a major contributor to the bottom line at all of the Big Three [getkc id="7" kc_name="EDA"] companies. ... » read more

One-On-One: Walid Abu-Hadba


Walid Abu-Hadba, chief product officer at [getentity id="22021" e_name="Ansys"] (and a former top executive at Microsoft), sat down with Semiconductor Engineering to talk about systems engineering and why the starting point is no longer the SoC. What follows are excerpts of that conversation. SE: How do you define system? Abu-Hadba: It's everything. It's the entire product and where the p... » read more

Simulation Performance Driven By Model Efficiency


In real estate it’s all about location, location, location. For system level simulation it’s all about performance, performance, performance. I have heard many opinions on the performance of SystemC and TLM simulations: some positive, some negative, much of the opinion based on hearsay or other unreliable information. I believe the performance of the simulation is mainly driven by the model... » read more

Tech Talk: Formal Discussion


Pratik Mahajan, senior R&D manager for verification at Synopsys, talks about how to use simulation plus formal verification. [youtube vid=TjO8up0nPGg] » read more

Filling In The Gaps For Mixed-Signal Verification


Semiconductor Engineering sat down to discuss mixed-signal [getkc id="10" kc_name="Verification"] with Haiko Morgenstern, Mixed-Signal Verification Group Staff Engineer at Infineon; Dr. Gernot Koch, CAD Manager at Micronas; Pierluigi Daglio, AMS Design Verification Flows Manager at STMicroelectronics; and Helene Thibieroz, AMS marketing manager at [getentity id="22035" comment="Synopsys"]. What... » read more

When To Use Simulation, When To Use Emulation


Should you emulate or simulate? In this brief historical review, Dr. Lauro Rizzatti compares the two and reveals when to use which and explains why only emulation can verify embedded SW in an SoC design. To read more, click here. » read more

Single Kernel Electro-Thermal IC Simulator


This paper investigates a new, highly-accurate and high-performing electro-thermal effects simulation method and tools. It describes the extension of an analog electrical simulator to handle the electrical network and the thermal network simultaneously. These innovations remove the constraint on the time constants and allow accurate validation of the electro-thermal behavior for even the most a... » read more

New Uses For Emulation


Semiconductor Engineering sat down to discuss the changing emulation landscape with Jim Kenney, director of marketing for emulation at Mentor Graphics; Tom Borgstrom, director of the verification group at Synopsys; Frank Schirrmeister, group director of product marketing for the System Development Suite at Cadence; Gary Smith, chief analyst at Gary Smith EDA; and Lauro Rizzatti, a verification ... » read more

New Uses For Emulation


Semiconductor Engineering sat down to discuss the changing emulation landscape with Jim Kenney, director of marketing for emulation at Mentor Graphics; Tom Borgstrom, director of the verification group at Synopsys; Frank Schirrmeister, group director of product marketing for the System Development Suite at Cadence; Gary Smith, chief analyst at Gary Smith EDA; and Lauro Rizzatti, a verification ... » read more

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