High-Speed Manufacturing And In-Field Scan Test Access Via PCI Express For GPIO Limited SoCs


By Ash Patel and Shubharthi Datta, Synopsys, and Chuanyun Fan, Cisco Today’s huge, deep submicron system on chip (SoC) designs present many challenges at every stage of development, from architectural exploration to volume production. This post addresses the specific hurdle of effective and efficient manufacturing tests for these complex devices. It outlines a commercially available soluti... » read more

Test Anything, Anywhere, Anytime


The semiconductor industry is under relentless pressure to deliver devices that are not only high-performing but also exceptionally reliable across their entire lifecycle. From the moment a chip is tested at the wafer to its deployment in complex systems such as data centers and automotive platforms, the expectation is clear: zero-defect quality at shipment and continuous reliability in the fie... » read more

Enhancing Silicon Reliability With In-System Test And SLM Data


Innovation in semiconductor development and manufacturing shows no signs of slowing down. Ever-larger chips at ever-smaller geometries create new challenges all the time. At the same time, competitive pressures are shrinking time to market (TTM) and putting enormous pressure on project teams. Furthermore, the wide use of electronics in safety-critical applications demands better reliability, av... » read more

Robust Dynamic Voltage Droop Mitigation And Power Management


Power management is one of the keys for developing successful semiconductors products. There are virtually no applications for which power consumption is not a concern. Many creative solutions have been developed to reduce and manage power. Making these schemes work robustly in real-world conditions can be a challenge. This post considers widely used methods—voltage droop/glitch detection and... » read more

Keeping The Lights On: How Digital Twins And Smart Semiconductor Management Power Our 24/7 World


Hey there, tech enthusiasts and digital pioneers! Have you ever stopped to think about the tiny, intricate components that keep our modern world humming? From the advanced safety features in your car to the massive data centers powering AI, semiconductors are truly the unsung heroes. But what happens when these tiny titans face immense pressure, like the non-stop demands of AI workloads? That's... » read more

Silicon Lifecycle Management


How chips are used is changing, and so are the requirements. In the past, markets were largely segmented by application, which determined how chips were designed. High-performance processors went into notebook computers, low-power chipsets were deployed in mobile devices, and complex SoCs and advanced packages were used in data centers. But with the spread of AI everywhere, traditional segmenta... » read more

Monitor, Test, And Repair For Multi-Die Health And Reliability


Ever since the earliest semiconductor devices, silicon health has been a concern. Systems manufacturers wanted to be sure that their chips worked properly before being soldered onto printed circuit boards (PCBs). They put pressure on semiconductor suppliers to test wafers, individual dies, and assembled parts before they were shipped. A wide range of design-for-test (DFT) approaches were develo... » read more

Silicon Lifecycle Management Gains Traction, But It’s Complicated


Silicon lifecycle management (SLM) is gaining ground in semiconductor design and test by leveraging specialized on-die sensors and analytics engines to improve power, performance, yield, and reliability. Most modern SoCs mitigate the guesswork by leveraging DFT, which includes adding memory built-in self-test (BiST) or improving functional coverage, but these tests were meant for verifying c... » read more

SLM: Actionable Silicon Insights Through Intelligent Measurement and Analysis


Developing semiconductors has always been a complex process, with advancements in electronic design automation (EDA) tools and fabrication technologies working to meet growing demands for larger designs, improved power efficiency, and better performance. As chip and system complexity increases alongside higher expectations for product reliability and longevity, traditional methods are reaching ... » read more

Security Tradeoffs: A Difficult Balance


Experts At The Table: Semiconductor Engineering sat down to discuss hardware security challenges, including new threat models from AI-based attacks, with Nicole Fern, principal security analyst at Keysight; Serge Leef, AI-For-Silicon strategist at Microsoft; Scott Best, senior director for silicon security products at Rambus; Lee Harrison, director of Tessent Automotive IC Solutions at Sieme... » read more

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