An Agent-Driven End-to-End HW-SW Co-Design Benchmark for Heterogeneous SoCs (Columbia, IBM)


Researchers from Columbia University and IBM Research have released “HSCO-Bench: An Agent-Driven End-to-End Hardware-Software Co-design Benchmark for Systems-on-Chip”. Abstract “Large language models (LLMs) are adopted for software and hardware design, yet these domains are still evaluated separately. Software benchmarks typically assume fixed hardware targets, while hardware be... » read more

Enabling A Critical Phase in SoC Development


High speed execution of an SoC model on an FPGA-based prototyping system is essential—both to permit development and verification of the full software stack and to understand hardware/software interactions—before silicon is available. But for SoC designs that include high-speed, voluminous I/O, it is equally essential that the prototype be exercised with large amounts of real-world I/O o... » read more

Agentic AI, Multi-Block Multi-User SoC Design Platform


The semiconductor industry is at an inflection point within its history. The latest technological advancements in AI, quantum computing, 5G, virtual and augmented reality, IoT, autonomous driving, and biotechnology have revolutionized the semiconductor industry. The growing demands of AI workloads and sophisticated model training are spurring highly specialized semiconductor chips with intricat... » read more

Why Silicon IP Has Become the Foundation of Modern SoC Design


Addressing challenges of using silicon IP, tracking IP cores, and taking advantage of the flexibility of modular design requires a proven process. It also requires a state-of-the-art IP management system and modular design roadmap that will lead to success in silicon. Keysight has identified 6 steps to effective IP management based on best practices and customer experiences. Read more here. » read more

Thanks For The Memories!


“I want to maximize the MAC count in my AI/ML accelerator block because the TOPs rating is what sells, but I need to cut back on memory to save cost,” said no successful chip designer, ever. Emphasis on “successful” in the above quote. It’s not a purely hypothetical quotation. We’ve heard it many times. Chip architects — or their marketing teams — try to squeeze as much brag-... » read more

Arm Total Compute: Engineering For Tomorrow’s Workload


As consumers seek richer and more immersive experiences from their devices, the way compute systems are engineered must continually evolve to keep up. Arm Total Compute takes a solution-focused approach to system-on-chip design, moving beyond individual IP elements to design and optimize the system as a whole to enable more digital immersion experiences. Not only does this white paper dis... » read more

Arm Total Compute: Engineering For Tomorrow’s Workloads


As consumers seek richer and more immersive experiences from their devices, the way compute systems are engineered must continually evolve to keep up. Arm Total Compute takes a solution-focused approach to system-on-chip design, moving beyond individual IP elements to design and optimize the system as a whole to enable more digital immersion experiences. Not only does this white paper dis... » read more

How Low Can You Go? Pushing The Limits Of Transistors


Deep low voltage enablement of embedded memories and logic libraries to achieve extreme low power: Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when... » read more

Best Practices For Cybersecurity-Aware SoC Development With ISO 21434


The growth of electronics in cars is exposing a new vector for cyberattacks on owners and automotive companies’ reputations. The potential human cost of an attack on the car’s electronics is driving urgency in the adoption of cybersecurity-aware practices, from OEMs and Tier 1s to every component supplier in the automotive industry. The standard “ISO/SAE 21434:2021 Road vehicles — Cyber... » read more

Adding Differentiating Value And Reducing IP Integration Time for Your SoC


In the most efficient SoC design processes, semiconductor companies design their own, differentiated IP blocks, acquire high-quality third-party IP, configure it in an SoC-optimized way, and integrate all blocks into the SoC infrastructure of clocks, voltage supplies, on-chip buffer memories or registers, and test circuits. The SoC design team defines and drives the SoC-specific implementation ... » read more

← Older posts