tag: SoC

Localized, System-Level Protocol Checks and Coverage Closure Using Veloce
By Various Writers - 29 Jan, 2014 - Comments: 0

Broadcom recently developed a unified, scalable, verification methodology based on the Veloce emulation platform. In order to test this new environment, they ran a test case, which proved that they can take assertions, compile them into Veloce, and verify that they fire accurately. In so doing, they were able to provide proof of concept for their primary goal: the creation of an internal flow t... » read more

The Next Big Threat: Power And Performance
By Ed Sperling - 17 Jan, 2014 - Comments: 3

In the shiny world of consumer electronics and powerful computers, taking a grinder to the outside of a package may sound more like safecracking than sophisticated electronic code hacking. The reality is there is more in common than most semiconductor companies would like to admit, and the starting point often is just as crude. To no small extent, systems on chip have become miniature safes.... » read more

Reducing Power Consumption in Mobile Applications with High-Speed Gear3 MIPI M-PHY IP
By Various Writers - 15 Jan, 2014 - Comments: 1

Mobile systems require increasing data volume for multiple chip-to-chip interfaces. The high-speed MIPI® M-PHY is tailored for mobile systems where performance, power, and efficiency are key criteria. With up to 5,824 Mbps bandwidth, the speed meets devices’ high bandwidth and scalability requirements. The M-PHY is designed to accommodate the intermittent nature of inter-chip communications ... » read more

Rethinking Old Sayings
By Jon McDonald - 21 Nov, 2013 - Comments: 0

One of my favorite quotes from Gary Smith is a few years old: “It’s the software, stupid!” That statement was made way back in 2006. While it was, and in some ways still is, very illustrative, I believe it also points to one extreme in the back and forth between focusing on hardware then software to differentiate our electronic systems. At the point in time Gary made the statement that... » read more

The Hunt For The Next Application To Drive System-Level Design And Verification
By Frank Schirrmeister - 20 Nov, 2013 - Comments: 0

In recent years, most of my customer presentations highlighted some type of mobile device – system and system on chip (SoC) — to explain the challenges for system-level design and verification. But I also like to look into other application domains to understand how challenges may develop over time and to identify similarities and differences in challenges between application domains. Co... » read more

Transient Current Crunch
By Ann Mutschler - 10 Oct, 2013 - Comments: 0

When Intel talks, people listen. So when Intel executive VP Dadi Perlmutter said in a keynote at ISSCC in 2012 that transient power noise was one of the most limiting aspects of the chip design process—and how the package and the board inductance are limiting how low they can take the supply voltage—it showed the gravity of the challenge of effectively managing transient power. Transient po... » read more

On-Chip MCUs Excel At Power Management
By Ann Mutschler - 10 Oct, 2013 - Comments: 0

By Ann Steffora Mutschler When it comes to supplying power to an SoC, there is an increasing trend to make it more intelligent—how to control it more accurately, how it is monitored and how it communicates with different aspects of the chip. Traditional power supply models with analog supplies have less of this control, so a number of engineering teams are considering the use of on-chip m... » read more

Over 65% Smartphone RF Switches SOI, Says Yole; Power Amps Next
By Various Writers - 14 Aug, 2013 - Comments: 0

By Adele Hars The industry research firm Yole Développement says that more than 65 percent of substrates used in fabricating switches for handsets are SOI-based. This is a high-growth part of the market, putting up double-digit increases. Like a standard SOI wafer, an RF SOI substrate has an active (“top”) layer on which CMOS transistors are built, with an isolating (“BOx”) ... » read more

Experts At The Table: Who Pays For Low Power?
By Ed Sperling - 11 Jul, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss the cost of low power with Fadi Gebara, research staff member for IBM’s Austin Research Lab; David Pan, associate professor in the department of electrical and computer engineering at the University of Texas; Aveek Sarkar, vice president of product engineering and support at Apache Design; and Tim Whitfield, director o... » read more

The Rise Of Semiconductor IP Subsystems
By Various Writers - 11 Jul, 2013 - Comments: 0

The semiconductor IP (SIP) market arose when SIP vendors created IP functions that mirrored those found in the discrete semiconductor market and made those functions available to SoC designers in the form of hard or soft SIP blocks. As the SoC and SIP markets evolved, it was a natural evolution that many discrete SIP functions be converged into larger blocks that mimic system-level functions (i... » read more

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