Hybrid Prototyping


David Svensson, applications engineer in Synopsys’ Verification Group, explains how a virtual transaction logic model can be connected to develop hardware-dependent drivers before RTL actually exists, why this is now critical for large, complex designs, and how to find the potential bottlenecks and debug both software and hardware. » read more

The MCU Dilemma


The humble microcontroller is getting squeezed on all sides. While most of the semiconductor industry has been able to take advantage of Moore's Law, the MCU market has faltered because flash memory does not scale beyond 40nm. At the same time, new capabilities such as voice activation and richer sensor networks are requiring inference engines to be integrated for some markets. In others, re... » read more

Changes In AI SoCs


Kurt Shuler, vice president of marketing at ArterisIP, talks about the tradeoffs in AI SoCs, which range from power and performance to flexibility, depending on whether processing elements are highly specific or more general, and the need for more modeling of both hardware and software together. » read more

Software In Inference Accelerators


Geoff Tate, CEO of Flex Logix, talks about the importance of hardware-software co-design for inference accelerators, how that affects performance and power, and what new approaches chipmakers are taking to bring AI chips to market. » read more

Software Is At Least As Important As Hardware For Inference Accelerators


In articles and conference presentations on Inference Accelerators, the focus is primarily on TOPS (frequency times number of MACs), a little bit on memory (DRAM interfaces and on chip SRAM), very little on interconnect (also very important, but that’s another story) and almost nothing on the software! Without software, the inference accelerator is a rock that does nothing. Software is wha... » read more

Ensuring Coverage In Large SoCs


Sven Beyer, product manager for design verification at OneSpin Solutions, talks about why formal technology is required to ensure coverage in some of the newest chips, how it deals with potential interactions and different use cases, and why it is gaining traction in automotive applications. » read more

Design For Airborne Electronics


The Next Generation Air Transportation System (NextGen), an FAA-led modernization of America's air transportation system meant to make flying more efficient, predictable and safer, is currently underway as one of the most ambitious infrastructure projects in U.S. history. This is not just a minor upgrade to an aging infrastructure. The FAA and partners are in the process of implementing new ... » read more

Divided On System Partitioning


Building an optimal implementation of a system using a functional description has been an industry goal for a long time, but it has proven to be much more difficult than it sounds. The general idea is to take software designed to run on a processor and to improve performance using various types of alternative hardware. That performance can be specified in various ways and for specific applic... » read more

Big Design, IP and End Market Shifts In 2020


EDA is on a roll. Design starts are up significantly thanks to increased investment in areas such as AI, a plethora of new communications standards, buildout of the Cloud, the race toward autonomous driving and continued advancements in mobile phones. Many designs demand the latest technologies and push the limits of complexity. Low power is becoming more than just reducing wasted power at t... » read more

More Knobs, Fewer Markers


The next big thing in chip design may be really big — the price tag. In the past, when things got smaller, so did the cost per transistor. Now they are getting more expensive to design and manufacture, and the cost per transistor is going up along with the number of transistors per area of die, and in many cases even the size of the die. That's not exactly a winning economic formula, which... » read more

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