Upping The Ante

By Ed Sperling - 13 Dec, 2012 - Comments: 0

The increasing number of research projects under way to solve many of the thorniest issues in the history of semiconductor design and manufacturing are a testament to just how tough the job has become. Never before have there been so many technological roadblocks at the same time—and so many potential options for solving them. Those challenges—or opportunities, as marketing execs like to... » read more

Don’t miss Fully-Depleted Tech Symposium during IEDM (SF)

By Various Writers - 04 Dec, 2012 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~ ~ If you want to cut through the noise surrounding the choices for 28nm and beyond, an excellent place to start is the SOI Consortium’s Fully Depleted Technology Symposium. As a member of the design and manufacturing communities, this is your chance to see and hear what industry leaders are actually doing. Planar? F... » read more

Considerations for Porting a Bulk CMOS Design to FD-SOI

By Various Writers - 16 Nov, 2012 - Comments: 0

Technologists describe a straight port of an existing bulk CMOS design to FD-SOI at the same node, obtaining the value of fully depleted SOI for a modest redesign effort. Considerations Bulk to FD - Release » read more

Innovative Wafers For Energy-Efficient CMOS Technology

By Various Writers - 18 Oct, 2012 - Comments: 0

For continued attractiveness and competitiveness of advanced electronic appliances such as smartphones, TVs, notebooks or tablets, the semiconductor industry is moving to “fully depleted” transistor technology to build integrated circuits. This technology comes in two flavors: planar and tri-dimensional (FinFET), each with its own advantages and challenges. This White Paper explains how inn... » read more

Wafer Leaders Extend Basis for Global SOI Supply

By Various Writers - 16 Oct, 2012 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~ ~ It’s a bright green light from the world leaders in SOI wafer capacity. Soitec, the world leader in SOI wafer production, and long-time partner Shin-Etsu Handatai (SEH), the world’s biggest producer of silicon wafers, have extended their licensing agreement and expanded their technology cooperation. SEH is a $12... » read more

Experts At The Table: IC Manufacturing Challenges

By Ed Sperling - 08 Oct, 2012 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future manufacturing challenges with Carlos Mazure, chief technical officer at Soitec; Jeff Hebb, vice president of laser product marketing at Ultratech; Markus Wimplinger, corporate technology development and IP director at EV Group; and Girish Dixit, vice president of the customer integration center and process inte... » read more

Experts At The Table: IC Manufacturing Challenges

By Ed Sperling - 01 Oct, 2012 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down with Carlos Mazure, chief technical officer at Soitec; Jeff Hebb, vice president of laser product marketing at Ultratech; Markus Wimplinger, corporate technology development and IP director at EV Group; and Girish Dixit, vice president of the customer integration center and process interactions at Lam Research. What follows are ... » read more

SPOTLIGHT ON FD-SOI, FINFETS AT IEEE SOI CONFERENCE ;1-4 OCT, NAPA

By Various Writers - 25 Sep, 2012 - Comments: 0

The 38th annual SOI Conference is coming right up. Sponsored by IEEE Electron Devices Society, this is the only dedicated SOI conference covering the full technology chain from materials to devices, circuits and system applications. Chaired this year by Gosia Jurczak (manager of the Memories Program at imec), this excellent conference is well worth attending. It’s where the giants of the ... » read more

Experts At The Table: IC Manufacturing Challenges

By Ed Sperling - 20 Sep, 2012 - Comments: 0

Power And Performance: GSS Sees SOI Advantages For FinFETs

By Various Writers - 17 Sep, 2012 - Comments: 0

Are FinFETs better on SOI? In a series of papers, high-profile blogs and subsequent media coverage,Gold Standard Simulations (aka GSS) has indicated that, yes, FinFETs should indeed be better on SOI. To those of us not deeply involved in the research world, much of this may seem to come out of nowhere. But there’s a lot of history here, and in this blog we’ll take a look at what it’s... » read more

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Upping The Ante

Don’t miss Fully-Depleted Tech Symposium during IEDM (SF)

Considerations for Porting a Bulk CMOS Design to FD-SOI

Innovative Wafers For Energy-Efficient CMOS Technology

Wafer Leaders Extend Basis for Global SOI Supply

Experts At The Table: IC Manufacturing Challenges

Experts At The Table: IC Manufacturing Challenges

SPOTLIGHT ON FD-SOI, FINFETS AT IEEE SOI CONFERENCE ;1-4 OCT, NAPA

Experts At The Table: IC Manufacturing Challenges

Power And Performance: GSS Sees SOI Advantages For FinFETs

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