tag: Sonics

An Analysis Of Blocking Vs. Non-Blocking Flow Control In On-Chip Networks
By Various Writers - 29 Dec, 2012 - Comments: 0

High end System-on-Chip (SoC) architectures consist of tens of processing engines. These processing engines have varied traffic profiles consisting of priority traffic that require that the latency of the traffic is minimized, controlled bandwidth traffic that require low service jitter on the throughput, and best effort traffic that can tolerate highly variable service. In this paper, we inves... » read more

What’s Ahead For System-Level Design
By Ed Sperling - 19 Dec, 2012 - Comments: 0

By Ann Steffora Mutschler Architecting an SoC today is incredibly difficult. When you add in the number of available transistors, the manufacturing effects of smaller nodes, IP and software that must be integrated, among other things, the challenges just keep mounting. Depending on what market segment the SoC will be designed into has a huge impact, as well. “It is impossible to ove... » read more

Executive Outlook
By Ed Sperling - 19 Dec, 2012 - Comments: 0

By Ed Sperling The view from the top of companies is a like a high-level of abstraction for viewing the industry. While engineers get caught up in individual projects, or pieces of projects, CEOs and CTOs tend to see things from a much broader perspective. So what do they see as the big issues and developments over the next 12 to 24 months? System-Level Design asked industry leaders that q... » read more

The Network Is The SoC…
By Frank Ferro - 19 Dec, 2012 - Comments: 0

By Frank Ferro SoC design continues to challenge semiconductor and system companies in their pursuit to create a better user experience for a wide range of products. Given this, I was pleasantly surprised to see that two of the “Ten technologies that will change the world in 2013,” according to EETimes (December 2012 issue) were SoC-related. One is virtual SoC prototypes and the other i... » read more

On-Chip Communications Survey Results
By Various Writers - 19 Dec, 2012 - Comments: 0

This comprehensive report takes a closer look at general technology trends and factors associated with OCCNs, such as core target speeds. It investigates the most popular OCCN topologies being considered for implementation in multi-core SoCs, including networks-on-chip (NoCs), crossbars, peripheral interconnect, and multi-layer bus matrices. It then dives deeper into NoCs, including analyzing a... » read more

Virtual IDM Progress Report
By Ed Sperling - 06 Dec, 2012 - Comments: 0

By Ed Sperling Complexity, tight power budgets, disaggregation of the supply chain and market fragmentation are conspiring to force much tighter partnerships among companies that develop different pieces of an SoC, as well as those that collaborate on even larger systems. This confluence of factors has forced the rules for how companies work together to be rewritten, but even within that frame... » read more

Engineering Change Orders Revisited
By Ed Sperling - 29 Nov, 2012 - Comments: 0

By Ed Sperling The perennial nightmare of the marketing head reporting that a customer will buy a design—but only if it fits into a specific power envelope or has better performance or I/O—is all too familiar to engineering teams. In theory, using more third-party IP should help alleviate this problem because the IP can be changed out relatively easily. The reality, though, is that it�... » read more

Open IP Development Tools
By Various Writers - 29 Nov, 2012 - Comments: 0

By Pascal Chauvet How much time have you wasted trying to understand software tools by deciphering the logic of their creator? I always find it very frustrating to be limited by features and tool capabilities that do not do exactly what I want, or which do not work at all with my other applications. We are engineers! We can learn and adapt, but we often want to be able to extend and improve th... » read more

The Growing Integration Challenge
By Ed Sperling - 08 Nov, 2012 - Comments: 0

By Ed Sperling As the number of processors and the amount of memory and IP on a chip continues to skyrocket, so does the challenge for integrating all of this stuff on a single die—or even multiple dies in the same package. There are a number of reasons why it’s getting more difficult to make all of these IP blocks work together. First of all, nothing ever stands still in design. As a r... » read more

Experts At The Table: The Business Of IP
By Ed Sperling - 26 Oct, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss IP supply chain issues with Jim Hogan, an independent VC; Jack Brown, senior vice president at Sonics; Mike Gianfagna, vice president of marketing at Atrenta; Paul Hollingworth, vice president of strategic accounts at eSilicon, and Warren Savage, CEO of IPextreme. What follows are excerpts of that conversation. LPHP:... » read more

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