tag: STMicroelectronics

The Week In Review: Manufacturing And Design
By Mark LaPedus - 10 Jan, 2014 - Comments: 1

Crucial.com reveals a surprising way to gain more time for improving one's personal health: fix a slow computer. A nationwide survey revealed that U.S. adults think they waste an average of 16 minutes per day waiting for their computer to load or boot up. Equating to two hours each week and four days per year lost to the wiles of a slow computer, it's no surprise that 66% of Americans say that ... » read more

The Week In Review: Manufacturing And Design
By Mark LaPedus - 03 Jan, 2014 - Comments: 0

Blocking cell phone use and texting while driving have been proposed by the U.S. government and for good reason. About 10 people a day are killed in “distraction-affected” car accidents in the U.S., according to the U.S. National Highway Traffic Safety Administration. As a result, some companies are developing technologies that can block texts while driving. But according to Strategy Analyt... » read more

Week In Review: System-Level Design
By Ed Sperling - 20 Dec, 2013 - Comments: 0

Synopsys extended its FPGA prototyping board with a new version that is optimized for IP and subsystems. This is particularly interesting given the fact that Synopsys is one of the largest IP providers and currently sells subsystems based on its ARC processor IP. Among the new features are support for 4 million gates for software development and hardware-software integration, as well as synthes... » read more

Manufacturing Bits: Dec. 17
By Mark LaPedus - 17 Dec, 2013 - Comments: 0

Implantable TFETs At the recent IEEE International Electron Devices Meeting (IEDM) in Washington, D.C., a number of companies, R&D organizations and universities described new breakthroughs in perhaps the next big thing in semiconductors--the tunnel field-effect transistor (TFET). Aimed for the 5nm node, TFETs are steep sub-threshold slope transistors that can scale the supply voltages bel... » read more

DSA, Multi-beam Make Steady Progress
By Mark LaPedus - 12 Dec, 2013 - Comments: 0

Semiconductor Engineering sat down to discuss current and future lithography challenges with Laurent Pain, lithography lab manager at CEA-Leti. What follows are excerpts of that conversation. SE: CEA-Leti has two major programs in lithography. One is in directed self-assembly (DSA) and the other is in multi-beam e-beam. Let’s start with multi-beam. What is Leti doing in multi-beam and what... » read more

Experts At The Table: What’s Missing In The IoT
By Ed Sperling - 11 Dec, 2013 - Comments: 0

Semiconductor Engineering sat down to discuss the future of the IoT with Oleg Logvinov, director of market development for STMicroelectronics’ Industrial and Power Conversion Division; Martin Lund, senior vice president of the IP Group at Cadence; Naveed Sherwani, president and CEO of Open-Silicon; and Damon Hernandez, a member of the Web3D Consortium. What follows are excerpts of that conver... » read more

New Challenges Emerge With FinFETs
By Ed Sperling - 05 Dec, 2013 - Comments: 0

Working at advanced process nodes is always tricky. There are new things to worry about and more rules to deal with initially, yet the promised benefit is improved performance, power and area, or cost. But at the next process node, and the one after that, there are so many variables coming into play that trying to make sense of the PPA equation is becoming much more difficult. Early reports ... » read more

Seven Ways To Improve PPA Before Moving To FinFETs
By Ed Sperling - 05 Dec, 2013 - Comments: 0

Henry Ford wrote in his autobiography, “Any customer can have a car painted any color that he wants so long as it is black.” And for decades, the semiconductor industry has marched to a similar theme set by Moore’s Law. But with the transition to finFETs harder than it first appeared, questions are beginning to pop up that is fueling a new level of confusion. While the growing list of... » read more

Experts At The Table: What’s Missing In The IoT
By Ed Sperling - 15 Nov, 2013 - Comments: 0

Semiconductor Engineering sat down to discuss the future of the IoT with Oleg Logvinov, director of market development for STMicroelectronics’ Industrial and Power Conversion Division; Martin Lund, senior vice president of the IP Group at Cadence; Naveed Sherwani, president and CEO of Open-Silicon; and Damon Hernandez, a member of the Web3D Consortium. What follows are excerpts of that conver... » read more

User Case Study
By Joseph Hupcey III - 08 Nov, 2013 - Comments: 0

In prior articles I’ve written in general terms of about formally verifying the impact of adding low power control circuitry with Jasper’s Low Power Verification App. At the recent Jasper User’s Group meeting on Oct. 22, a real world case study of this app in action at STMicro’s R&D center in India was presented. Here are some highlights from this paper: DUT in question: an AR... » read more

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