Blog Review: Dec. 21


Cadence's Paul McLellan points to Log4J, a logging utility with a new major vulnerability that could affect hundreds of millions of devices, what's being done to address it, and why the underlying problems may be around for decades. Siemens EDA's Ray Salemi continues explaining how to use Python for verification by checking out the Python logging module for pyuvm and how it compares to UVM r... » read more

Flexible USB4-Based Interface IP Solution For AI At The Edge


Consumers have become accustomed to smart devices that are powered by advances in artificial intelligence (AI). To expand the devices’ total addressable market, innovative device designers build edge AI accelerators and edge AI SoCs that support multiple use cases and integration options. This white paper describes a flexible USB4-based IP solution for edge AI accelerators and SoCs. The IP so... » read more

Perspectives On Why EUV Photomasks Are More Expensive


There are fewer photomasks per wafer using EUV lithography, but each EUV photomask is more expensive. Given that, it’s not a surprise that a majority (74%) of industry luminaries surveyed in July say that EUV photomasks will contribute to an increase in photomask revenues for 2021 as shown in figure 1. In a 20-minute video, a panel of experts share their perspectives on what drives EUV photom... » read more

Week In Review: Design, Low Power


Memory CEA-Leti demonstrated 16-kbit ferroelectric random-access memory (FeRAM) arrays at the 130nm node. It utilizes back-end-of-line (BEOL) integration of TiN/HfO2:Si/TiN ferroelectric capacitors as small as 0.16 µm² and solder reflow compatibility for the first time for this type of memory. The researchers anticipate it will be useful for embedded applications such at IoT and wearable dev... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Features of Toyota’s key fobs for entering vehicles get turned off when drivers do not start paying a subscription fee when the complementary subscriptions end, says an article in Ars Technica. SiLC Technologies announced its compact Eyeonic Vision Sensor, a FMCW lidar sensor, is now commercially available. The sensor has a silicon photonic chip that keeps a lidar’s size down... » read more

Blog Review: Dec. 15


Arm's Hannah Peeler, Joshua Randall, and Zach Lasiuk examine the carbon cost of data centers and introduce a tool that allows users to make informed decisions about the carbon impact of their compute workloads. Synopsys' Kenneth Larsen provides a primer on the fundamentals of quantum computing, the role of photonics in building quantum systems, and the future potential impact on chip design.... » read more

The Return Of DAC In-Person


Apart from masked faces everywhere, you could be excused for not knowing that there was a pandemic going on. Sure, the numbers were down, the show floor was smaller, and most of the parties didn't happen, but everyone was so happy to be able to bump elbows with their colleagues. Buttons were available for attendees to show the level of comfort they had with various types of greetings, from "... » read more

Can Coherent Optics Reduce Data-Center Power?


As optical bandwidth requirements increase, system designers are turning to “coherent” modulation schemes that can place more data on the same laser light, and lower power over long connections. A newer question is whether those savings could be achieved for short connections within data centers, as well. “Coherent is the direction everything's moving, because for a given system and... » read more

Innovations In Sensor Technology


Sensors are the “eyes” and “ears” of processors, co-processors, and computing modules. They come in all shapes, forms, and functions, and they are being deployed in a rapidly growing number of applications — from edge computing and IoT, to smart cities, smart manufacturing, hospitals, industrial, machine learning, and automotive. Each of these use cases relies on chips to capture d... » read more

Run Realistic Software For Full Chip Power Signoff


In the real world, the demand for AI chips is driving the trend towards bigger, smarter, and faster SoC designs. Consequently, low-power design, analysis, verification, and power signoff challenges are not getting any easier as chip designs deploy increasingly smaller geometries that dissipate more and more power. Despite this dilemma, the quest for further power reductions continues apace. ... » read more

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