Designing Secure and Trusted Silicon Using Shift-Left in Verification


Designing secure silicon requires the design to be stable at all times, it shouldn't enter unknown states at any time to make it vulnerable from the security point of view. This paper identifies different sources of instability such as combinational feedback loop, unguarded clock and reset crossing, unguarded power crossing, etc. These instabilities can lead to unknown value propagation and hig... » read more

Blog Review: May 12


Cadence's Claire Ying points to major changes in PCIe 6.0 as PAM4 signaling replaces NRZ to help double bandwidth, Forward Error Correction helps maintain data integrity, and various improvements are made to power consumption. Synopsys' Samantha Beaumont argues that automotive sensors are a major potential attack point and addresses some of the key areas of sensor vulnerability and the chall... » read more

In-Chip Sensing And PVT Monitoring: Not Just An Insurance Policy


You wouldn’t drive an expensive car without insurance or take a flight in an aircraft without performing instrument and control surface checks. So why would you take the risk of designing a multi-million dollar advanced node semiconductor device without making sure you are aware of, and able to manage, the dynamic conditions that had the potential to make or break a silicon product? Advanced... » read more

Chip Monitoring And Test Collaborate


As on-chip monitoring becomes more prevalent in complex advanced-node ICs, it’s easy to question whether or not it conflicts with conventional silicon testing. It might even supplant such testing in the future. Or alternatively, they could interact, with each supporting the other. “On-chip monitors provide fine-grained observability into effects and issues that are otherwise difficult or... » read more

Testing Analog Circuits Becoming More Difficult


Foundries and packaging houses are wrestling how to control heat in the testing phase, particularly as devices continue to shrink and as thermally sensitive analog circuits are added into SoCs and advanced packages to support everything from RF to AI. The overriding problem is that heat can damage chips or devices under test. That's certainly true for digital chips developed at advanced node... » read more

FPGA Prototyping: Supersizing Scale And Performance


Given the cost of re-spinning a system-on-chip (SoC), semiconductor companies have always looked for ways to verify and validate the SoC before tape-out. Prototyping using field programmable gate arrays (FPGAs) became a key methodology as part of this pre-silicon verification and validation effort. Click here to read more. » read more

Week In Review: Design, Low Power


Synopsys completed its acquisition of MorethanIP, a provider of Ethernet Digital Controller IP supporting data rates from 10G to 800G. The acquisition adds MAC (Medium Access Controller) and PCS (Physical Coding Sublayer) for 200G/400G and 800G Ethernet to Synopsys’ portfolio. The company also provides Time-Sensitive Networking, Fibre Channel, and Ethernet Switching IP for integration into AS... » read more

Week In Review: Auto, Security, Pervasive Computing


Pervasive computing — IoT, edge, cloud, data center, and back Foxconn (also known as Hon Hai Technology Group) is forming a joint venture (JV) with Yageo Group, a component production and process management company for EVs and other high-end electronics, to focus on the development of semiconductors under $2 USD, which they call “small ICs.” Through the JV, a new company called XSemi wil... » read more

Developers Turn To Analog For Neural Nets


Machine-learning (ML) solutions are proliferating across a wide variety of industries, but the overwhelming majority of the commercial implementations still rely on digital logic for their solution. With the exception of in-memory computing, analog solutions mostly have been restricted to universities and attempts at neuromorphic computing. However, that’s starting to change. “Everyon... » read more

Meeting Automotive Functional Safety Requirements With GPIOs


Automotive OEMs are building advanced driver assistance systems (ADAS) to improve safety. ADAS systems must meet stringent performance, power, and cost requirements, so the system-on-chips (SoCs) that make up ADAS and passenger safety systems integrate advanced protocols and are built on leading edge finFET process technologies. Designers of this new class of ADAS SoCs are challenged to meet IS... » read more

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