Blog Review: June 1


Analog Photonics' Erman Timurdogan, Ren-Jye Shiue, and Mohammad H. Teimourpour, and Ansys' Bozidar Novakovic, Ahsan Alam, and Peter Hallschmid consider the development of photonic process design kits and the importance of choosing a laser model that can optimally satisfy often conflicting requirements between the number of known laser parameters, the model accuracy, and the computational time. ... » read more

Week In Review: Design, Low Power


EnSilica listed on the London Stock Exchange's AIM market under the ticker ENSI. EnSilica designs mixed signal ASICs for system developers in the automotive, industrial, healthcare, and communications markets. It also has a portfolio of core IP covering cryptography, radar and communications systems. AIM is the LSE’s market for small and medium sized growth companies. "In connection with Admi... » read more

How To Optimize A Processor


Optimizing any system is a multi-layered problem, but when it involves a processor there are at least three levels to consider. Architects must be capable of thinking across these boundaries because the role of each of the layers must be both understood and balanced. The first level of potential optimization is at the system level. For example, how does data come in and out of the processing... » read more

Will Big Competition Attract More Talent For IC Companies?


Google is hiring a chip packaging technologist. General Motors is seeking a wafer fabrication procurement specialist. Facebook Reality Labs wants a materials researcher with experience in photolithography and nanoimprint techniques. Recent job postings by tech and automotive giants are enough to worry any chip company executive struggling to attract talent. But what may seem at first like a ... » read more

Next-Generation Distributed Static Timing Analysis On The Cloud


Ever-growing chip size and complexity put pressure on every step and every electronic design automation (EDA) tool in the development flow. More decisions must be made at the architectural stage, stressing virtual prototypes and high-level models. Simulations become slower and consume more memory. Formal verification struggles to achieve full proofs. Logic synthesis and layout have a harder tim... » read more

Designing Application-Specific Processors for Wireless 5G SoCs


Traditional architectures for wireless baseband applications are no longer adequate for recent and next-generation modem standards. Supporting complex and still evolving standards like 5G in a single modem is only possible by using SDR techniques, which place increasing demands on performance and power consumption on the SoC. ASIP architectures enable full customization of a processor, which... » read more

Blog Review: May 25


Coventor's Michael Hargrove points to the need for a new generation of deep-submicron CMOS circuits that can operate at deep-cryogenic temperatures to achieve a quantum integrated circuit where the array of qubits is integrated on the same chip as the CMOS electronics required to read the state of the qubits. Ansys' Marc Swinnen warns about dynamic voltage drop as ultra-low supply voltages, ... » read more

Embedded Software: Sometimes Easier, Often More Complex


Embedded software, once a challenge to write, update, and optimize, is following the route of other types of software. It is abstracted, simpler to use, and much faster to write. But in some cases, it's also much harder to get right. From a conceptual level, the general definition of embedded software has not changed much. It's still low-level drivers and RTOSes that run close to the hardwar... » read more

Standardizing Chiplet Interconnects


The chip industry is making progress on standardizing the infrastructure for chiplets, setting the stage for faster and more predictable integration of different functions and features from different vendors. The ability to choose from a menu of small, highly specialized chips, and to mix and match them for specific applications and use cases, has been on the horizon for more than a decade. ... » read more

Week In Review: Manufacturing, Test


GlobalFoundries launched GF Labs, an “open framework of internal and external research and development initiatives that deliver a differentiated pipeline of market-driven process technology solutions for future data-centric, connected, intelligent and secure applications.” Greg Bartlett, GF's senior vice president of technology, engineering at quality, said the goal is to develop and exp... » read more

← Older posts Newer posts →