tag: Synopsys

Interconnects Essential To Heterogeneous Integration
By Karen Heyman - 28 Mar, 2024 - Comments: 0

Designing and manufacturing interconnects is becoming more complex, and more critical to device reliability, as the chip industry shifts from monolithic planar dies to collections of chips and chiplets in a package. What was once as simple as laying down a copper trace has evolved into tens of thousands of microbumps, hybrid bonds, through-silicon vias (TSVs), and even junctions for optical ... » read more

Engineers Or Their Tools: Which Is Responsible For Finding Bugs?
By Ann Mutschler and Adam Kovac - 28 Mar, 2024 - Comments: 0

Experts at the table: Finding and eliminating bugs at the source can be painstaking work, but it can prevent bigger problems later in the design flow, when they are more difficult and expensive to fix.  Semiconductor Engineering sat down to discuss these issues with Ashish Darbari, CEO at Axiomise; Ziyad Hanna, corporate vice president R&D at Cadence; Jim Henson, ASIC verification software... » read more

Rapid Timing Constraints Signoff With Automated Constraint Management
By Rimpy Chugh - 28 Mar, 2024 - Comments: 0

Signoff of a system on chip (SoC) or IP design has multiple aspects, but often timing closure is the most challenging. Early use of a static timing analysis (STA) tool is clearly important, and such a tool must be tied closely into the logic synthesis process to make it more likely that the generated gate-level netlist will meet the desired timing. Power, performance, and area (PPA) goals can o... » read more

V2X Security Is Multi-faceted, And Not All There
By Ann Mutschler - 27 Mar, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss Vehicle-To-Everything (V2X) technology and potential security issues, with Shawn Carpenter, program director, 5G and space at Ansys; Lang Lin, principal product manager at Ansys; Daniel Dalpiaz, senior manager product marketing, Americas, green industrial power division at Infineon; David Fritz, vice president of virtual and hy... » read more

Leveraging Automotive Chip Design Techniques For Space-Borne Applications
By Synopsys - 27 Mar, 2024 - Comments: 0

Space-borne electronics must operate in an unforgiving environment with harsh conditions and little opportunity to repair failing components. A combination of functionally safe design, RHBD, and robust IP is required. Fortunately, automotive applications share many of the same challenges, and techniques to address these challenges are well established and proven. This white paper surveys the ma... » read more

Blog Review: Mar. 27
By Jesse Allen - 27 Mar, 2024 - Comments: 0

Cadence's Steve Brown suggests that multi-die technologies will be a key part of the path toward a faster, more efficient chip ecosystem that can support the compressed development cycles now emerging in the automotive industry. Synopsys' John Swanson, Madhumita Sanyal, and Priyank Shukla point to the role of simulation in ensuring seamless operation in the Ethernet ecosystem though rigorous... » read more

Early STEM Education Key To Growing Future Chip Workforce
By Liz Allan - 25 Mar, 2024 - Comments: 4

A key factor in building a domestic workforce for the chip industry is attracting kids to science, technology, engineering, and math (STEM) subjects at a younger age. That way they are more likely to follow through and attain the skills and degrees needed to enter the semiconductor job market. Industry and government are partnering with schools and community organizations to address the chal... » read more

Chip Industry Week In Review
By The SE Staff - 22 Mar, 2024 - Comments: 0

By Adam Kovac, Gregory Haley, and Liz Allan. The U.S. government released a 61-page report, titled "National Strategy on Microelectronics Research,” by the Subcommittee On Microelectronics Leadership. It provides a framework for government, industry, academia, and international allies to address four major goals. Synopsys  acquired Intrinsic ID, which develops physical unclonable func... » read more

Digital Twins Target IC Tool And Fab Efficiency
By Laura Peters - 21 Mar, 2024 - Comments: 0

Digital twins have emerged as the hot "new" semiconductor manufacturing technology, enabling fabs to create a virtual representation of a physical system on which to experiment and optimize what's going on inside the real fab. While digital twin technology has been in use for some time in other industries, its use has been limited in semiconductor manufacturing. What's changing is the breadt... » read more

The High NA EUV Imperative: How Computational Lithography Solutions Enable Us To Think Smaller
By Gandharv Bhatara - 21 Mar, 2024 - Comments: 0

The future of computing depends on miniaturization, and extreme ultraviolet lithography (EUV) is one key enabler. Until recently, we have relied on low numerical aperture (NA) EUV systems with an aperture of 0.33 to help us reduce the size of integrated circuits (ICs). As with deep ultraviolet (DUV) technology, this has begun to reach its limits. High NA EUV lithography with a 0.55 aperture rep... » read more

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