Chip Industry Week In Review

By The SE Staff - 18 Apr, 2025 - Comments: 0

[Podcast version is here.] TSMC said it will produce 30% of its leading-edge chips in Arizona when all six of its fabs are operational, a total investment of $165 billion, Axios reported. In its latest SEC filing, the foundry said it continues to add capacity in Taiwan, Arizona, Japan, and Germany. The Trump administration launched a Section 232 investigation into semiconductors and relat... » read more

TCAD For GPUs And GPUs For TCAD

By Shela Aboud - 17 Apr, 2025 - Comments: 0

It is well known that many steps in chip development become exponentially harder as feature sizes shrink and instance counts balloon. Billions of transistors are now commonplace, and wafer-scale devices with trillions are on the horizon. Such massive chips put pressure on every electronic design automation (EDA) tool in the development flow, from front-end architectural modeling to signoff and ... » read more

Can Chiplets Serve Cost-Conscious Apps?

By Bryon Moyer - 17 Apr, 2025 - Comments: 0

Chiplets are emerging as a significant new phase in the evolution of the semiconductor market, providing a way to continue scaling performance well beyond the size limitations of a reticle. But that improvement comes with a high price tag and a lot more complexity, which so far has limited adoption. One of the main reasons for the cost increase is the need for advanced packaging when employi... » read more

Backside Power Delivery Nears Production

By Laura Peters - 17 Apr, 2025 - Comments: 0

Backside power delivery is being called a game changer — a breakthrough technology and the next great enabler in CMOS scaling. It promises significant PPA advances, including faster switching, lower voltage droop, and reduced power supply noise. And it is poised to deliver these benefits below the 2nm node, despite a substantial disruption in front-end processes from lithography pattern di... » read more

Packaging With Fewer People And Better Results

By Gregory Haley - 17 Apr, 2025 - Comments: 1

Advanced packaging has evolved far beyond the simple stacking of dies and connecting of interposers. Once a passive conduit between silicon and the outside world, it has become an active component of overall device performance. In today’s multi-die assemblies, the assembly and packaging lines are expected to maintain signal integrity at multi-gigahertz frequencies, manage heat in verticall... » read more

Advanced Atomistic Simulation Techniques For Atomic Layer Etching

By Synopsys - 17 Apr, 2025 - Comments: 0

Continuous downscaling of the critical dimensions in semiconductor devices is the cornerstone of technological revolution. As the technology nodes keep shrinking, innovations in fabrication technologies are needed to continue the trend. We have arrived at the age where atomic level precision in the fabrication of semiconductor devices is needed to keep improving PPA. Thus, advanced film fabrica... » read more

Blog Review: Apr. 16

By Jesse Allen - 16 Apr, 2025 - Comments: 0

Siemens’ Tova Levy finds that heterogeneous integration necessitates a shift to a system-level technology co-optimization approach where power, performance, area, cost, and reliability are considered across various components, including silicon, package, interposer, and PCB. Synopsys’ Greg Sorber listens in as Arm’s Rene Haas and Synopsys’ Sassine Ghazi discuss the opportunity for AI... » read more

AI Agents Need Goals

By Brian Bailey - 16 Apr, 2025 - Comments: 0

Experts At The Table: Definitions and goals matter when it comes to using AI effectively, and it has to be tightly reined in to be effective. Semiconductor Engineering sat down with a panel of experts to discuss these issues and others, including Johannes Stahl, senior director of product line management for the Systems Design Group at Synopsys; Michael Young, director of product marketing for ... » read more

Leveraging Foundation IP For Low-Power AI Processor Development

By Shruti Bagaria - 15 Apr, 2025 - Comments: 0

Artificial intelligence (AI) has become widespread in recent years, quickly establishing itself as a groundbreaking technology. AI operates on machine learning (ML) algorithms, which demand substantial computational power. Traditionally, designers have utilized graphics processing units (GPUs) to run these ML algorithms. Initially created for graphics rendering, GPUs have shown to be highly eff... » read more

Chiplet Tradeoffs And Limitations

By Ann Mutschler - 10 Apr, 2025 - Comments: 0

The semiconductor industry is buzzing with the benefits of chiplets, including faster time to market, better performance, and lower power, but finding the correct balance between customization and standardization is proving to be more difficult than initially thought. For a commercial chiplet marketplace to really take off, it requires a much deeper understanding of how chiplets behave indiv... » read more

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tag: Synopsys

Chip Industry Week In Review

TCAD For GPUs And GPUs For TCAD

Can Chiplets Serve Cost-Conscious Apps?

Backside Power Delivery Nears Production

Packaging With Fewer People And Better Results

Advanced Atomistic Simulation Techniques For Atomic Layer Etching

Blog Review: Apr. 16

AI Agents Need Goals

Leveraging Foundation IP For Low-Power AI Processor Development

Chiplet Tradeoffs And Limitations

Trending Articles

Advanced Packaging Fundamentals for Semiconductor Engineers

Chiplet Tradeoffs And Limitations