tag: Synopsys

Securing Camera Data: Introducing The MIPI CSE 2.0 Security Solution
By Dana Neustadter - 02 Jul, 2026 - Comments: 0

By Dana Neustadter and Mehak Kalra High‑performance imaging has become a cornerstone of modern electronic systems. From mobile phones to advanced driver‑assistance systems (ADAS) and autonomous driving to robotics, extended reality (xR), medical devices, and industrial automation, cameras and imaging sensors are proliferating rapidly. These systems increasingly rely on MIPI Camera Serial... » read more

Fine-Tuning Humanoid Vision And Movement
By Liz Allan - 02 Jul, 2026 - Comments: 0

Key Takeaways: Humanoids and autonomous vehicles share a zonal architecture, a need for FuSa, and a reliance on radar technology to see around corners and through objects. Multiple cameras with different fidelities can better replicate a human’s field of view; for example, some can provide wide fields of view at low grade, low fidelity, while others strive for infinite fidelity in a... » read more

Observability Is A Missing Layer In AI-Era Chiplet Design
By Ann Mutschler - 01 Jul, 2026 - Comments: 0

Key Takeaways: In chiplet-based architectures, observability must be designed as a fabric-aligned, cross-die telemetry plane so architects can correlate traffic, latency, congestion, and fault behavior across package boundaries without losing system context. AI can extract value from high-volume silicon telemetry only when the architecture provides consistent instrumentation, near-senso... » read more

Blog Review: July 1
By Jesse Allen - 01 Jul, 2026 - Comments: 0

Cadence's Krunal Patel highlights auto-negotiation, a foundational feature in Ethernet that allows two connected devices to automatically determine the best possible operating parameters for a link, eliminating manual configuration and ensuring optimal performance. Synopsys' Sumit Vishwakarma warns of the rising cost of overdesign, particularly in advanced node and multi-die designs, and how... » read more

Re-Engineering Engineering for Automotive with Electronics Digital Twins for the SDV Era
By Synopsys - 01 Jul, 2026 - Comments: 0

As vehicles become software-defined, traditional development approaches can’t keep pace with growing complexity, shorter innovation cycles, and rising validation demands. By leveraging the Synopsys eDT Platform for Automotive, companies can accelerate software bring-up, enhance collaboration, reduce prototyping costs, and ensure higher safety and reliability across the vehicle lifecycle. ... » read more

HW Fingerprinting Technique for Silicon Photonic ICs Using Photonic Crystal-based Density-Controlled Patterns (U. of Florida)
By Technical Paper Link - 29 Jun, 2026 - Comments: 0

Researchers from University of Florida published a technical paper titled “Enhancing Co-packaging Optics Enabled Silicon Photonics Security Assurance Hardware Fingerprinting.” Abstract Excerpt: The paper proposes a method that “embeds two-dimensional photonic crystal (PhC) patterns” and creates a “distinctive optical signature” for device authentication. Find the technical pap... » read more

Rethinking Chip Verification
By Ann Mutschler - 29 Jun, 2026 - Comments: 0

Key Takeaways: AI and modern tools are easing traditional verification pain, but they're not addressing the underlying bottleneck in complex designs. Work is underway to create a golden, unambiguous spec above RTL, tracing requirements from spec to implementation to verification and checking for gaps, conflicts, and inconsistencies across levels and blocks, often with AI help. Tool c... » read more

Chip Industry Week In Review
By The SE Staff - 26 Jun, 2026 - Comments: 0

IBM unveiled a 7Å transistor architecture that uses staggered nanosheet transistors stacked on a precisely beveled angle, almost like tiles on a roof. That allows more transistors to be crammed into a given area, boosting performance by 50% or power efficiency by up to 70%. Perhaps even more important, IBM claims a 40% improvement in SRAM scaling, which is orders of magnitude faster and lower ... » read more

I/O Design Challenges Grow In AI Data Centers And HPC Clusters
By Liz Allan - 25 Jun, 2026 - Comments: 0

Key Takeaways: A designer’s choice of I/O connectors and interconnect protocols can be the difference between a massively profitable AI chip and a flop. I/O tradeoffs impact airflow, cooling, rack design, power coming into the rack, and other critical aspects of HPC chip design. Reliability is paramount, so standards must be followed, and I/Os need redundant pins. Other innovations... » read more

Verification Methodologies Struggle To Keep Up With AI
By Brian Bailey - 25 Jun, 2026 - Comments: 0

Key Takeaways:  The rapid development of AI has resulted in new capabilities being provided to verification teams, beyond their ability to rationally insert them into accepted methodologies.  There is a lot of uncertainty about who will benefit the most from this technology. Is AI a junior engineer replacement or an enhancer?  The biggest benefits will come when AI helps engineers... » read more

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