tag: Synopsys

Importance Of Certifications In Automotive IP
By Pawini Mahajan - 10 Oct, 2023 - Comments: 0

The automotive industry is renowned for its unwavering commitment to enforcing strict standards for enabling safety, quality, reliability, and security. However, upholding stringent measures to ensure vehicle safety and reliability has led to the need for predictive maintenance i.e., using advanced monitoring and analytical techniques as a part of Silicon Lifecycle Management (SLM) to anticipat... » read more

How Much AI Is Really Needed?
By John Koon - 05 Oct, 2023 - Comments: 0

Tensor Core GPUs have created a generative AI model gold rush. Whether it’s helping students with math homework, planning a vacation, or learning to prepare a six-course meal, generative AI is ready with answers. But that's only one aspect of AI, and not every application requires it. AI — now an all-inclusive term, referring to the process of using algorithms to learn, predict, and make... » read more

Higher Automotive MCU Performance With Interface IP
By Ron DiGiuseppe - 05 Oct, 2023 - Comments: 1

By Ron DiGuiseppe and Hezi Saar AI is making waves across many industries, and automotive is no exception. Today’s vehicles are smarter and more connected than ever, and AI is at the heart of it all. Many new advanced driver assistance system (ADAS) applications, such as automatic emergency braking, adaptive cruise control, and lane-keeping assistance, are built using the latest AI algorit... » read more

How Quickly Will Multi-Die Systems Change Semiconductor Design?
By Synopsys - 04 Oct, 2023 - Comments: 0

For many decades, semiconductor design and implementation has been focused on monolithic, ever-larger and more complex single-chip implementation. This system-on-chip approach is now changing for a variety of reasons. The new frontier utilizes many chips assembled in new ways to deliver the required form-factor and performance. Multi-die systems are paving the way for new types of semiconduc... » read more

Blog Review: October 4
By Jesse Allen - 04 Oct, 2023 - Comments: 0

Cadence's Felipe Goncalves checks out the Integrity and Data Encryption (IDE) feature in PCIe 6.0, a new layer inserted between the transection layer and data link layer with the goal of protecting against threats from physical attacks on the link. Siemens' Robin Bornoff, Daniel Berger, and Kai Liu explore the potential for large language models (LLMs) make the use of CAE tools simpler, more... » read more

Meeting The Material Challenges Of Nano-CMOS Electronics
By Technical Paper Link - 03 Oct, 2023 - Comments: 0

A technical paper titled “Shockley-Read-Hall recombination and trap levels in In0.53 Ga0.47As point defects from first principles” was published by researchers at University of Glasgow and Synopsys Denmark. Abstract: "We present charge state transition levels of 23 intrinsic defects and dopant substitutions in the compound III-V semiconductor In0.53 Ga0.47 As, calculated with density func... » read more

Die-To-Die Security
By Ed Sperling - 02 Oct, 2023 - Comments: 0

Security concerns are growing as more chiplets or die are added into a package. There are more possible attack points, and data is becoming increasingly valuable, which makes a successful attack much more lucrative than in the past. Mike Borza, Synopsys scientist, talks about the impact of heterogeneous integration on security, what the risks are for multi-tenant data centers, and what happens ... » read more

Everyone’s A System Designer With Heterogeneous Integration
By Ann Mutschler - 02 Oct, 2023 - Comments: 0

The move away from monolithic SoCs to heterogeneous chips and chiplets in a package is accelerating, setting in motion a broad shift in methodologies, collaborations, and design goals that are felt by engineers at every step of the flow, from design through manufacturing. Nearly every engineer is now working or touching some technology, process, or methodology that is new. And they are inter... » read more

Chip Industry Week In Review
By The SE Staff - 29 Sep, 2023 - Comments: 0

By Susan Rambo, Liz Allan, and Gregory Haley. TSMC rolled out the second version of its 3Dblox, which creates an infrastructure for stacking chiplets and other necessary components in a package, along with a standardized way of achieving that. Two novel features are chiplet mirroring for design reuse, and what is basically sandbox for power and thermal analysis of different design elements. ... » read more

Accelerating Analog Design Migration
By Yuval Shay - 28 Sep, 2023 - Comments: 0

Today’s electronic chips are commonly comprised of a mix of analog, RF, and digital components, with increasing functionalities, complexities, and numbers of transistors reaching the trillions. While the digital side of the house can take advantage of automated design implementation tools, the analog world has always been more about doing things manually and in a very “custom” way—which... » read more

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