tag: Synopsys

RTL Signoff vs. Functional Signoff: What’s The Difference?
By Bradley Geden - 17 Jul, 2025 - Comments: 1

By Bradley Geden and Manoz Palaparthi In semiconductor design, “signoff” is often treated as a single milestone. In practice, however, it encompasses distinct verification phases with unique objectives. Functional signoff and RTL signoff represent two such phases. Both are essential, and each one is focused on different facets of correctness. While functional signoff verifies whether ... » read more

Often Overlooked, PHYs Are Essential To High-Speed Data Movement
By Ann Mutschler - 17 Jul, 2025 - Comments: 0

Over the past couple of decades, the semiconductor industry has evolved from a supporting role for traditional verticals like mobile, automotive, and PCs to a foundational role in those markets, as well as in AI factories and hyperscale data centers. Underlying this transformation is the physical layer (PHY), which has emerged as a critical enabler for data transfer and communications. The P... » read more

When Can I Buy A Chiplet?
By Brian Bailey - 17 Jul, 2025 - Comments: 1

One year ago, Semiconductor Engineering conducted its first roundtable to find out the true state of the industry for chiplets. At that event, it was stated that no chiplet had ever been reused in a design for which it was not initially intended. How much has changed over the past year? Returning from last year were Mark Kuemerle, vice president of technology for Marvell; Letizia Giuliano, vice... » read more

Blog Review: July 16
By Jesse Allen - 16 Jul, 2025 - Comments: 0

Synopsys' Bradley Geden and Manoz Palaparthi explain the difference between functional signoff and RTL signoff and why increased SoC complexity means that verification flows must now capture both the intent and the integrity of a design before it can move forward. Cadence's Frank Ferro finds that LPDDR isn't just for mobile devices anymore, with the new LPDDR6 standard bringing increased ban... » read more

AI In Chip Design: Tight Control Required
By Ed Sperling - 16 Jul, 2025 - Comments: 0

Executive Outlook: Semiconductor Engineering sat down with a panel of experts to talk about what's needed to effectively leverage AI, who benefits from it, and where software-defined hardware works best, with Bill Mullen, Ansys fellow; John Ferguson, senior director of product management at Siemens EDA; Chris Mueth, senior director of new markets and strategic initiatives at Keysight; Albert Ze... » read more

Chip Industry Technical Paper Roundup: July 15
By Linda Christensen - 15 Jul, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=446 /] Find more semiconductor research papers here. » read more

On-chip Monitor Analytics Scales With Silicon Chip Production From NPI Through HVM
By Guy Cortez - 10 Jul, 2025 - Comments: 0

By Guy Cortez and Dan Alexandrescu At the New Product Introduction (NPI) stage of silicon chip production, product engineers work with a limited but critical dataset – typically from initial silicon samples or engineering lots – enabling early assessment of the power and performance of your silicon. Analytics solutions typically have no time-to-results (TTR) issues when the volume of dat... » read more

Easing The Stress For Package-Level Burn-In
By Laura Peters - 10 Jul, 2025 - Comments: 0

Considered something of a necessary evil, burn-in of IC packages during production does a great job of weeding out latent defects so they don’t turn into failures in the field. But as AI and multi-chiplet packages become more common, and concerns about aging circuitry heighten, shifting stress testing to the wafer level looks increasingly attractive from a quality, throughput, and cost standp... » read more

PUFs In A Post-Quantum World
By Synopsys - 09 Jul, 2025 - Comments: 0

With the looming threat of quantum computing on the horizon, the security landscape is changing. Explore the emerging threat and its implications for current cryptographic standards. This white paper provides an in-depth analysis of quantum computing's impact on security and explains how PUF technology can help you maintain robust security in the quantum era. Why Read This? Quantum Comp... » read more

AI Pushes High-End Mobile From SoCs To Multi-Die
By Liz Allan - 08 Jul, 2025 - Comments: 0

Advanced packaging is becoming a key differentiator for the high end of the mobile phone market, enabling higher performance, more flexibility, and faster time to market than systems on chip. Monolithic SoCs likely will remain the technology of choice for low-end and midrange mobile devices because of their form factor, proven record, and lower cost. But multi-die assemblies provide more fle... » read more

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