tag: Synopsys

RISC-V Driving New Verification Concepts
By Brian Bailey - 12 Apr, 2023 - Comments: 0

Semiconductor Engineering sat down to discuss gaps in tools and why new methodologies are needed for RISC-V processors, with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, ... » read more

Blog Review: April 12
By Jesse Allen - 12 Apr, 2023 - Comments: 0

Cadence's Ericles Sousa describes the five critical features of automotive SoC architectures that are essential for developing the next generation of passenger vehicles. In a podcast, Siemens' Steph Chavez chats with Gerry Partida of Summit Interconnect about the difficulties in collaboration between PCB designers and manufacturers, along with best practices that designers should follow to r... » read more

What Data Center Chipmakers Can Learn From Automotive
By Anne Meixner - 11 Apr, 2023 - Comments: 2

Automotive OEMs are demanding their semiconductor suppliers achieve a nearly unmeasurable target of 10 defective parts per billion (DPPB). Whether this is realistic remains to be seen, but systems companies are looking to emulate that level of quality for their data center SoCs. Building to that quality level is more expensive up front, although ultimately it can save costs versus having to ... » read more

Challenges In Photonics Testing
By Karen Heyman - 11 Apr, 2023 - Comments: 0

Photonics is poised for significant growth due a rapid increase in data volumes and the need to move that data quickly and with minimal heat. But to reach its full potential photonics will have to overcome several production hurdles. The biggest challenge today involves alignment. While the industry is poised to produce billions of units, it still relies on testing practices that don't scale. ... » read more

Power-Aware Test: Beyond Low-Power Test
By Rahul Singhal - 11 Apr, 2023 - Comments: 0

By Rahul Singhal and Likith Kumar Manchukonda Power consumption is one of the key considerations when designing today’s semiconductor chips and systems. Over the years, the constant need for higher performance and more functions from the chips has been driving the continuous requirement for higher transistor density. The process node scaling makes this possible by reducing transistor sizes... » read more

Week In Review: Design, Low Power
By Jesse Allen - 07 Apr, 2023 - Comments: 0

MLCommons debuted the latest results for the MLPerf Inference v3.0 and Mobile v3.0 benchmark suites, which measure the performance and power-efficiency of applying a trained machine learning model to new data in data center, edge, and mobile use cases. Overall, MLCommons said the results showed both power efficiency improvements and significant gains in performance in some benchmark tests. Seve... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 07 Apr, 2023 - Comments: 0

Automotive, Mobility Tesla employees have been viewing customer videos, according to an investigative report by Reuters. The news outlet surveyed and interviewed Tesla employees, who described using the footage for both legitimate purposes and entertainment purposes within the company. Some employees forwarded videos to coworkers. Even Tesla CEO Elon Musk was not immune. Employees found an in... » read more

How To Safeguard Memory Interfaces By Design
By Dana Neustadter - 06 Apr, 2023 - Comments: 0

By Dana Neustadter and Brett Murdock In 2017, the credit bureau Equifax announced that hackers had breached its system, unleashing the personal information of 147-million people. As a result, the company has settled a class action suit for $425 million to aid those impacted, including identity theft, fraud, financial losses, and the expenses to clean up the damage. Whether the threat is iden... » read more

Chiplet Security Risks Underestimated
By Ann Mutschler - 06 Apr, 2023 - Comments: 0

The semiconductor ecosystem is abuzz with the promise of chiplets, but there is far less attention being paid to security in those chiplets or the heterogeneous systems into which they will be integrated. Disaggregating SoCs into chiplets significantly alters the cybersecurity threat landscape. Unlike a monolithic multi-function chip, which usually is manufactured using the same process tech... » read more

The Architect’s Dilemma And Closing The Loop With Implementation
By Frank Schirrmeister - 06 Apr, 2023 - Comments: 0

Gordon Moore has left a mark on our industry. Moore's Law has shaped decades of development. The EDA industry has been moving up the layers of abstraction to increase the productivity and predictability of design flows in our efforts to address the ever-increasing complexity of semiconductors and electronics developments. I had written about it in "Chasing The Next Level Of Productivity" not lo... » read more

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