The Drive Toward Virtual Prototypes

Chipmakers are piling an increasing set of demands on virtual prototypes that go well beyond its original scope, forcing EDA companies to significantly rethink models, abstractions, interfaces, view orthogonality, and flows. The virtual prototype has been around for at least 20 years, but its role has been limited. It has largely been used as an integration and analysis platform for models t... » read more

From Constraints To Tape-Out: Towards A Continuous AMS Design Flow

The effort in designing analog/mixed-signal (AMS) integrated circuits is characterized by the largely manual work involved in the design of analog cells and their integration into the overall circuit. This inequality in effort between analog and digital cells increases with the use of modern, more complex technology nodes. To mitigate this problem, this paper presents four methods to improve ex... » read more

System-Level Power Modeling Takes Root

Power, heat, and their combined effects on aging and reliability, are becoming increasingly critical variables in the design of chips that will be used across a variety of new and existing markets. As more processing moves to edge, where sensors are generating a tsunami of data, there are a number of factors that need to be considered in designs. On one side, power budgets need to reflect th... » read more

How To Model Cars

The most technologically advanced and comprehensive consumer product in the world today is not the smartphone. It's the automobile. This is easier to see once the hood is up and you can take a peek around. Today’s cars contain sophisticated motion systems, crash safety systems, climate control systems, driver assistance, and infotainment, to name a few. In semiconductor design, one of the ... » read more

Taking Stock Of Models

By Ann Steffora Mutschler The world of modeling in SoC design is multi-dimensional to say the least. One dimension contains the model creators and providers, while the other is comprised of the types of models that exist in the marketplace. “What we’re seeing today is that we have basically models coming from either IP providers—the people that are actually producing those cores ... » read more

TLM-Driven Design And Verification—Time For A Methodology Shift

While today’s RTL design and verification flows are a step up from the gate-level flows of two decades ago, RTL flows are straining to meet the demands of most product teams. When designs are sourced and verified at the register transfer level (RTL), IP reuse is difficult, functional verification is lengthy and cumbersome, and architectural decisions cannot be confirmed prior to RTL verificat... » read more

Being Different Is Bad

By Ann Steffora Mutschler Today’s SoCs contain as much as 80% existing IP that either has been re-used from previous projects or obtained from a third party. Models are created of this hardware IP, as well as new portions of the design, in order to create a virtual prototype that allows the engineering team to see the complete system by running software and applications. While this a... » read more