Chip Industry Technical Paper Roundup: July 1


New technical papers recently added to Semiconductor Engineering’s library: [table id=426 /] Find more semiconductor research papers here. » read more

Wafer Bonding Mechanisms Using SiCN Films For Hybrid Bonding Applications In 3D Integration 


A new technical paper titled "Material-Mechanistic Interplay in SiCN Wafer Bonding for 3D Integration" was published by researchers at Yokohama National University, TEL, SK hynix, and University of Tsukuba. According to the paper: "Although much research has been conducted on wafer bonding methods compatible with the latest semiconductor manufacturing processes, discussions on the interface... » read more

Chip Security Now Depends On Widening Supply Chain


Securing chips is becoming more challenging as SoCs are disaggregated into chiplets, creating new vulnerabilities that involve hardware and software, as well as multiple entities, and extending threats across a much broader supply chain. In the past, much of the cyber threat model was confined to either hardware or software, and where multiple vendors were involved, various chips were separa... » read more

Key Technologies To Extend EUV To 14 Angstroms


The top three foundries plan to implement high-NA EUV lithography as early as 2025 for the 18 angstrom generation, but the replacement of single exposure high-NA (0.55) over double patterning with standard EUV (NA = 0.33) depends on whether it provides better results at a reasonable cost per wafer. So far, 2024 has been a banner year for high-numerical aperture EUV lithography. Intel Foundry... » read more

Ruthenium Interconnects On Tap


Chipmakers' focus on new interconnect technology is ramping up as copper's effectiveness continues to diminish, setting the stage for a significant shift that could improve performance and reduce heat at future nodes and in advanced packages. The introduction of copper interconnects in 1997 upended the then-standard tungsten via/aluminum line metallization scheme. Dual damascene integration ... » read more

Digital Twins Target IC Tool And Fab Efficiency


Digital twins have emerged as the hot "new" semiconductor manufacturing technology, enabling fabs to create a virtual representation of a physical system on which to experiment and optimize what's going on inside the real fab. While digital twin technology has been in use for some time in other industries, its use has been limited in semiconductor manufacturing. What's changing is the breadt... » read more

Chip Industry Week In Review


By Susan Rambo, Jesse Allen, and Liz Allan The U.S. government will provide about $162 million in federal incentives, under the CHIPS and Science Act, to help Microchip onshore its semiconductor supply chain. The move is aimed at securing a reliable domestic supply of MCUs and mature-node chips. “Today’s announcement will help propel semiconductor manufacturing projects in Colorado and O... » read more

Money Pours Into New Fabs And Facilities


Fabs, packaging, test and assembly, and R&D all drew major funding in 2023. Companies poured money into offshore locations, such as India and Malaysia, to access a larger workforce and lower costs, while also partnering with governments to secure domestic supply chains amid ongoing geopolitical turmoil. Looking ahead, artificial intelligence (AI), quantum computing, and data applications... » read more

Week In Review: Manufacturing, Test


The Chinese government is considering easing proposed rules that require foreign office equipment makers operating in the country to transfer key product technology to China, per Nikkei Asia. In April 2022, Chinese authorities began revamping their national standards to include a new requirement that key components, such as semiconductors and laser-related items, be designed, developed, and pro... » read more

High-NA Lithography Starting To Take Shape


The future of semiconductor technology is often viewed through the lenses of photolithography equipment, which continues to offer better resolution for future process nodes despite an almost perpetual barrage of highly challenging technological issues. For years, lithography was viewed as the primary manufacturing-related gating factor to continued device scaling, beset by multiple delays th... » read more

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