tag: thermal effects

Planarization Challenges At 7nm And Beyond
By Ed Sperling - 10 Dec, 2018 - Comments: 0

Dan Sullivan, executive director of semiconductor technology at Brewer Science, digs into the challenges of planarizing a thin film on a wafer for etch and optical control. The problem becomes more difficult at advanced nodes because the films are thinner. https://youtu.be/iNA6EGpoYZU     _________________________________ See more tech talk videos here   » read more

Manufacturing Bits: May 29
By Ed Sperling - 29 May, 2018 - Comments: 0

Utilizing Heat For Energy One of the big problems in electronics in general, and semiconductors particular, is heat. And it's not just about leakage current anymore. Heat is a problem at every level, from circuit design to the materials being used inside the chips, as well as warpage between die caused by heat after they are packaged together. Heat can prematurely age chips as well as destroy ... » read more

Early Chip-Package-System Thermal Analysis
By Annapoorna Krishnaswamy - 10 May, 2018 - Comments: 0

Next-generation automotive, HPC and networking applications are pushing the requirements of thermal integrity and reliability, as they need to operate in extreme conditions for extended periods of time. FinFET designs have high dynamic power density, and power directly impacts the thermal signature of the chip. Thermal degradation typically occurs over an extended period of chip operation. ... » read more

Tech Talk: 5/3nm Parasitics
By Ed Sperling - 22 Feb, 2018 - Comments: 0

Ralph Iverson, principal R&D engineer at Synopsys, talks about parasitic extraction at 5/3nm and what to expect with new materials and gate structures such as gate-all-around FETs and vertical nanowire FETs. https://youtu.be/24C6byQBkuI » read more

New Thermal Issues Emerge
By Ann Mutschler - 12 Feb, 2018 - Comments: 0

Thermal monitoring is becoming more critical as gate density continues to increase at each new node and as chips are developed for safety critical markets such as automotive. This may sound counterintuitive because the whole point of device scaling is to increase gate density. But at 10/7 and 7/5nm, static current leakage is becoming a bigger issue, raising questions about how long [getkc id... » read more

Tech Talk: 7nm Power
By Ed Sperling - 19 Jun, 2017 - Comments: 0

Annapoorna Krishnaswamy, lead applications engineer at ANSYS, talks with Semiconductor Engineering about power-related changes at 7nm and what engineering teams need to watch out for as they move down to the latest process technology. https://youtu.be/Ym46ssJPeHM » read more

MEMS: Improving Cost And Yield
By Ed Sperling - 13 Mar, 2017 - Comments: 2

MEMS devices inspire awe on the design side. On the test and manufacturing side, they evoke a different kind of reaction. These are, after all, the intersection of mechanical and electrical engineering—a joining of two miniature worlds that are the basis of some of the most complex technology on the planet. But getting these devices to yield sufficiently, understanding what does or does no... » read more

What Can Be Cut From A Design?
By Ann Mutschler - 09 Feb, 2017 - Comments: 0

A long-standing approach of throwing everything into a chip increasingly is being replaced by a focus on what can be left out it. This shift is happening at every level, from the initial design to implementation. After years of trying to fill every square nanometer of real estate on a piece of silicon with memory and logic, doubling the number of [getkc id="26" kc_name="transistors"] from on... » read more

Optimization Challenges For 10nm And 7nm
By Brian Bailey - 06 Sep, 2016 - Comments: 0

Optimization used to be a simple timing against area tradeoff but not anymore. As we go to each new node, the tradeoffs become more complicated involving additional aspects of the design that used to be dealt with in isolation. Semiconductor Engineering sat down to discuss these issues with Krishna Balachandran, director of product management for low-power products at [getentity id="22032" e... » read more

The Road To 5nm
By Ed Sperling - 23 Jun, 2016 - Comments: 1

There is strong likelihood that enough companies will move to 7nm to warrant the investment. How many will move forward to 5nm is far less certain. Part of the reason for this uncertainty is big-company consolidation. There are simply fewer customers left who can afford to build chips at the most advanced nodes. Intel bought Altera. Avago bought Broadcom. NXP bought Freescale. GlobalFoundrie... » read more

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