Research Bits: Jan. 16


3D stacking of 2D materials Researchers from Penn State University demonstrated monolithic 3D integration with 2D transistors made from 2D semiconductors called transition metal dichalcogenides. The 2D materials have unique electronic and optical properties, including sensitivity to light, making them ideal for use as sensors. “One challenge is the process temperature ceiling of 450 degre... » read more

Multi-Chiplet Marvels: Exploring Chip-Centric Thermal Analysis


The relationship between power consumption and thermal dynamics for chips is intricate. As power is consumed during the operation of a chip, it results in the generation of heat. This heat may dissipate from the device, metal routing, or the die itself, leading to increased temperatures on the chip. The dissipation process perpetually expends redundant energy, thereby compromising on the overal... » read more

Decoding GDS To Thermal Model Conversion


Driven by Moore’s Law and modern, ubiquitous computation power demand, the market will continue to demand higher chip performance. Therefore, modern chips with ever-higher power densities present critical thermal challenges. With the ever-shrinking design margins, designers must manage their thermal budget at every stage of the design, from chip to system. Now, let us shift left and start ... » read more

Help, 3D-IC Is Stuck In A Country Song


Every time I focus on three-dimensional (3D) integrated circuit (IC) design, I start hearing the Luke Bryan song “Rain Makes Corn, Corn Makes Whiskey.” Not because I need a strong drink to work with 3D-IC designs, but because there is a similar, although slightly more complicated, series of cause and effect issues that impact 3D-ICs. Pushing electrons through very thin metal wires and switc... » read more

Why Chiplets Don’t Work For All Designs


Experts at the Table: Semiconductor Engineering sat down to discuss use cases and challenges for commercial chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts... » read more

Research Bits: September 19


Measuring lithography plasma sources Researchers from the University of Twente developed a tool that can measure the size of a plasma source and the color of the light it emits simultaneously, which they say could be used to improve lithography machines. “Traditionally, we could only look at the amount of light produced, but to further improve the chipmaking process, we also want to study... » read more

No Hot Products


While marketers strive to launch the next “hot” product, engineers struggle to prevent literally hot products! A recent breakthrough in thermal modeling comes just in time as electronic component manufacturers and their OEM customers increasingly battle thermal design issues. Analog electronic component manufacturers have traditionally provided models in SPICE format so customers can sim... » read more

Battling Over Shrinking Physical Margin In Chips


Smaller process nodes, coupled with a continual quest to add more features into designs, are forcing chipmakers and systems companies to choose which design and manufacturing groups have access to a shrinking pool of technology margin. In the past margin largely was split between the foundries, which imposed highly restrictive design rules (RDRs) to compensate for uncertainties in new proces... » read more

Celsius EC Solver


The Cadence Celsius EC Solver is electronics cooling simulation software for accurate and fast analysis of the thermal performance of electronic systems. It enables electronic system designers to accurately address the most challenging thermal/electronics cooling issues today. The Celsius EC Solver utilizes a powerful computational engine and meshing technology that enables designers to model a... » read more

Holistic Power Reduction


The power consumption of a device is influenced by every stage of the design, development, and implementation process, but identifying opportunities to save power no longer can be just about making hardware more efficient. Tools and methodologies are in place for most of the power-saving opportunities, from RTL down through implementation, and portions of the semiconductor industry already a... » read more

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