Scaling Up Compute-In-Memory Accelerators


Researchers are zeroing in on new architectures to boost performance by limiting the movement of data in a device, but this is proving to be much harder than it appears. The argument for memory-based computation is familiar by now. Many important computational workloads involve repetitive operations on large datasets. Moving data from memory to the processing unit and back — the so-called ... » read more

Week In Review: Manufacturing, Test


Fab tools, materials and packaging Intel has recognized 37 companies for its annual suppliers’ awards. The list includes equipment, materials, packaging houses and other segments. These suppliers have collaborated with Intel to implement process improvements with good products and services. See who made the list here. ---------------------------------------- Lam Research has introduced... » read more

3nm: Blurring Lines Between SoCs, PCBs And Packages


Leading-edge chipmakers, foundries and EDA companies are pushing into 3nm and beyond, and they are encountering a long list of challenges that raise questions about whether the entire system needs to be shrunk onto a chip or into a package. For 7nm and 5nm, the problems are well understood. In fact, 5nm appears to be more of an evolution from 7nm than a major shift in direction. But at 3nm, ... » read more

Week In Review: Manufacturing, Test


SPIE At the SPIE Advanced Lithography conference, Lam Research has introduced a new dry resist technology for extreme ultraviolet (EUV) lithography. Dry resist technology is a new approach to deposit and develop EUV resists. It is a dry deposition technique with alternate compositions and mechanisms. By combining Lam’s deposition and etch process expertise with partnerships with ASML a... » read more

Week In Review: Design, Low Power


Tools Synopsys debuted the VC SpyGlass RTL Static Signoff platform featuring new noise reduction technology that uses machine learning to reduce noise by 10X without loss of quality of results. It also provides comprehensive CDC and RDC analysis to catch logic issues added during implementation, and is integrated with Synopsys' automated debug system. Ansys released RaptorH, a tool that com... » read more

Week In Review: Auto, Security, Pervasive Computing


AI/Edge The United States Department of Defense (DOD) has adopted ethical principles for using artificial intelligence in warfare that chiefly say the U.S. has to follow the laws, treaties, in use of AI in warfare. Any AI used by DOD has to be responsible, equitable, traceable, reliable and governable. “The Department will design and engineer AI capabilities to fulfill their intended functio... » read more

Week In Review: Manufacturing, Test


Fab tools The United States is mulling over new trade export restrictions for U.S. fab equipment to China, according to a report from The Wall Street Journal. “Recent press reports suggest the U.S. Department of Commerce is exploring additional measures to limit Huawei's access to U.S. semiconductor capital equipment (SPE) by requiring chip manufacturing plants globally to procure license... » read more

What’s In Your IP?


Jeff Markham, software architect at ClioSoft, talks with Semiconductor Engineering about IP traceability in markets such as automotive and aerospace, what’s actually in IP, what should not be in that IP from a security standpoint, and how all of this data can used to avert system reliability issues in the future. » read more

MOCVD Vendors Eye New Apps


Several equipment makers are developing or ramping up new metalorganic chemical vapor deposition (MOCVD) systems in the market, hoping to capture the next wave of growth applications in the arena. Competition is fierce among the various MOCVD equipment suppliers in the market, namely Aixtron, AMEC and Veeco. In addition, MOCVD equipment suppliers are looking for renewed growth in 2020, but b... » read more

Moving To GAA FETs


How do you measure the size of a transistor? Is it the gate length, or the distance between the source and drain contacts? For planar transistors, the two values are approximately the same. The gate, plus a dielectric spacer, fits between the source and drain contacts. The contact pitch, limited by the smallest features that the lithography process can print, determines how many transistors ... » read more

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