tag: TSMC

Making 3D Structures And Packages More Reliable
By Ed Sperling - 14 Jan, 2020 - Comments: 0

The move to smaller vertical structures and complex packaging schemes is straining existing testing approaches, particularly in heterogeneous combinations on a single chip and in multi-die packages. The complexity of these devices has exploded with the slowdown in scaling, as chipmakers turn to architectural solutions and new transistor structures rather than just relying on shrinking featur... » read more

Where Technology Breakthroughs Are Needed
By Mark LaPedus - 23 Dec, 2019 - Comments: 2

After years of delays, extreme ultraviolet (EUV) lithography is finally in production at the 7nm logic node with 5nm in the works. EUV, a next-generation lithography technology, certainly will help chipmakers migrate to the next nodes. But EUV doesn’t solve every problem. Nor does it address all challenges in the semiconductor industry. Not by a long shot. To be sure, the industry needs... » read more

What Worked, What Didn’t In 2019
By Brian Bailey - 19 Dec, 2019 - Comments: 1

2019 has been a tough year for semiconductor companies from a revenue standpoint, especially for memory companies. On the other hand, the EDA industry has seen another robust growth year. A significant portion of this disparity can be attributed to the number of emerging technology areas for semiconductors, none of which has reached volume production yet. Some markets continue to struggle, a... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 13 Dec, 2019 - Comments: 0

Chipmakers and OEMs TrendForce has released its projected foundry rankings for the fourth quarter of 2019. TSMC remains in first place, followed by Samsung, GlobalFoundries and UMC, according to the firm. “TrendForce projects the foundry industry’s 4Q19 revenue performance to exceed previous expectations,” according to the firm. “Nonetheless, the ongoing U.S-China trade war and uncerta... » read more

Multi-Patterning EUV Vs. High-NA EUV
By Mark LaPedus - 04 Dec, 2019 - Comments: 4

Foundries are finally in production with EUV lithography at 7nm, but chip customers must now decide whether to implement their next designs using EUV-based multiple patterning at 5nm/3nm or wait for a new single-patterning EUV system at 3nm and beyond. This scenario revolves around ASML’s current extreme ultraviolet (EUV) lithography tool (NXE:3400C) versus a completely new EUV system with... » read more

Thermal Challenges In Advanced Packaging
By Ed Sperling - 02 Dec, 2019 - Comments: 2

CT Kao, product management director at Cadence, talks with Semiconductor Engineering about why packaging is so complicated, why power and heat vary with different use cases and over time, and why a realistic power map is essential particularly for AI chips, where some circuits are always on.   Interested in more Semiconductor Engineering videos? Sign-up for our YouTube channel here » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 22 Nov, 2019 - Comments: 0

Chipmakers For some time, Intel has experienced supply constraints and shortages for its 14nm chip products. Apparently, the company is still having issues with both 14nm and 10nm. “Despite our best efforts, we have not yet resolved this challenge,” according to a statement from Michelle Johnston Holthaus, executive vice president and general manager of the Sales, Marketing and Communicati... » read more

Planning For Panel-Level Fan-out
By Mark LaPedus - 21 Nov, 2019 - Comments: 0

Several companies are developing or ramping up panel-level fan-out packaging as a way to reduce the cost of advanced packaging. Wafer-level fan-out is one of several advanced packaging types where a package can incorporate dies, MEMS and passives in an IC package. This approach has been in production for years, and is produced in a round wafer format in 200mm or 300mm wafer sizes. Fan-out... » read more

Different Ways To Improve Chip Reliability
By Ed Sperling - 12 Nov, 2019 - Comments: 1

A push toward greater reliability in safety- and mission-critical applications is prompting some innovative approaches in semiconductor design, manufacturing, and post-production analysis of chip behavior. While quality over time has come under intensive scrutiny in automotive, where German carmakers require chips to last 18 years with zero defects, it isn't the only market demanding extende... » read more

Leveraging Data In Chipmaking
By Ed Sperling - 12 Nov, 2019 - Comments: 0

John Kibarian, president and CEO of PDF Solutions, sat down with Semiconductor Engineering to talk about the impact of data analytics on everything from yield and reliability to the inner structure of organizations, how the cloud and edge will work together, and where the big threats are in the future. SE: When did you recognize that data would be so critical to hardware design and manufact... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy