Chip Industry Week in Review


AI featured big at this week's Design Automation Conference (DAC) in San Francisco. Dozens of companies featured AI-related tools (see product section below), as well as significant improvements to existing tools and some entirely new approaches for designing chips. Among the highlights: Siemens unveiled an AI-enhanced toolset for the EDA design flow that enables customers to integrate the... » read more

Chip Industry Week in Review


Texas Instruments will invest more than $60 billion to build and expand seven semiconductor fabs in Texas and Utah, supporting more than 60,000 U.S. jobs. Chinese automakers — including SAIC Motor, Changan, Great Wall Motor, BYD, Li Auto and Geely — are aiming to launch new models with 100% homemade chips, some as early as 2026, reports Nikkei Asia. Marvell introduced 2nm custom SRAM ... » read more

Chip Industry Week in Review


The Chinese Academy of Sciences unveiled a fully automated processor chip design system, claiming the potential to accelerate semiconductor development and replace human programmers. Micron Technology plans to expand its U.S. investments to approximately $150 billion in domestic memory manufacturing and $50 billion in R&D, which is $30 billion higher than previously reported. AMD laun... » read more

Chip Industry Technical Paper Roundup: May 20


New technical papers recently added to Semiconductor Engineering’s library: [table id=432 /] Find more semiconductor research papers here. » read more

CFETs: Reliability of Complementary Field-Effect Transistors (TU Munich, IIT)


A technical paper titled "CFET Beyond 3 nm: SRAM Reliability under Design-Time and Run-Time Variability" was published by researchers at TU Munich and IIT Kanpur. Abstract "This work investigates the reliability of complementary field-effect transistors (CFETs) by addressing both design-time variability arising from process variations and run-time variability due to temperature and aging ef... » read more

Chip Industry Technical Paper Roundup: May 6


New technical papers recently added to Semiconductor Engineering’s library: [table id=427 /] Find more semiconductor research papers here.   » read more

Investigation Of Self-Heating Effects on Fe-FinFETs On IMC Applications (TU Munich, IIT, U. Stuttgart)


A new technical paper titled "Investigating Self-Heating Effects in Ferroelectric FinFETs for Reliable In-Memory Computing" was published by researchers at TU Munich, University of Stuttgart and Indian Institute of Technology, Kanpur. Abstract "Ferroelectric (Fe) FET has emerged as a promising candidate for efficient in-memory computing due to its properties, such as non-volatility and lo... » read more

Chip Industry Technical Paper Roundup: Jan. 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=400 /] Find all technical papers here. » read more

Impact of Extremely Low Temperatures On The 5nm SRAM Array Size and Performance


A new technical paper titled "Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures" was published by researchers at University of Stuttgart, IIT Kanpur, National Yang Ming Chiao Tung University, Khalifa University, and TU Munich. Abstract "Complementary metal–oxide–semiconductor (CMOS)-based computing promises drastic improvement in performance at extremely low temp... » read more

Characterizing and Evaluating A Quantum Processor Unit In A HPC Center


A new technical paper titled "Calibration and Performance Evaluation of a Superconducting Quantum Processor in an HPC Center" was published by researchers at Leibniz Supercomputing Centre, IQM Quantum Computers, and Technical University of Munich. Abstract "As quantum computers mature, they migrate from laboratory environments to HPC centers. This movement enables large-scale deployments,... » read more

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