Chip Industry Technical Paper Roundup: May 6


New technical papers recently added to Semiconductor Engineering’s library: [table id=427 /] Find more semiconductor research papers here.   » read more

Investigation Of Self-Heating Effects on Fe-FinFETs On IMC Applications (TU Munich, IIT, U. Stuttgart)


A new technical paper titled "Investigating Self-Heating Effects in Ferroelectric FinFETs for Reliable In-Memory Computing" was published by researchers at TU Munich, University of Stuttgart and Indian Institute of Technology, Kanpur. Abstract "Ferroelectric (Fe) FET has emerged as a promising candidate for efficient in-memory computing due to its properties, such as non-volatility and lo... » read more

Chip Industry Technical Paper Roundup: Jan. 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=400 /] Find all technical papers here. » read more

Impact of Extremely Low Temperatures On The 5nm SRAM Array Size and Performance


A new technical paper titled "Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures" was published by researchers at University of Stuttgart, IIT Kanpur, National Yang Ming Chiao Tung University, Khalifa University, and TU Munich. Abstract "Complementary metal–oxide–semiconductor (CMOS)-based computing promises drastic improvement in performance at extremely low temp... » read more

Characterizing and Evaluating A Quantum Processor Unit In A HPC Center


A new technical paper titled "Calibration and Performance Evaluation of a Superconducting Quantum Processor in an HPC Center" was published by researchers at Leibniz Supercomputing Centre, IQM Quantum Computers, and Technical University of Munich. Abstract "As quantum computers mature, they migrate from laboratory environments to HPC centers. This movement enables large-scale deployments,... » read more

Chip Industry Technical Paper Roundup: April 23


New technical papers recently added to Semiconductor Engineering’s library. [table id=216 /] Find last week’s technical paper additions here. » read more

Comparison Of The Meta Modeling Approach With HGLs


A new technical paper titled "The Argument for Meta-Modeling-Based Approaches to Hardware Generation Languages" was published by researchers at Infineon Technologies and TU Munich. Abstract "The rapid evolution of Integrated Circuit (IC) development necessitates innovative methodologies such as code generation to manage complexity and increase productivity. Using the right methodology for g... » read more

Chip Industry’s Technical Paper Roundup: May 23


New technical papers recently added to Semiconductor Engineering’s library: [table id=104 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us... » read more

Non-Traditional Design of Dynamic Logic Gates and Circuits with FDSOI FETs


A new technical paper titled "Non-Traditional Design of Dynamic Logics using FDSOI for Ultra-Efficient Computing" was published by researchers at University of Stuttgart, UC Berkeley, Indian Institute of Technology Kanpur, and TU Munich, with funding by the German Research Foundation. Abstract "In this paper, we propose a non-traditional design of dynamic logic circuits using Fully-Deplet... » read more

Chip Industry’s Technical Paper Roundup: Apr. 4


New technical papers recently added to Semiconductor Engineering’s library: [table id=90 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

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