FD-SOI Workshop ppts – STM’s 1st 28nm FD-SOI product line

By Various Writers - 12 Mar, 2012 - Comments: 0

The SOI Consortium’s 6th FD-SOI workshop, held just after ISSCC, yielded some exciting news. Most of the presentations are freely available for downloading from the SOI Consortium website. Here are the highlights. STMicroelectronics In a terrific presentation by Giorgio Cesana, Marketing Director at STMicroelectronics, he revealed that the company would be releasing a major product line b... » read more

More Analog Needed For Multicore SoCs

By Ed Sperling - 08 Sep, 2011 - Comments: 0

By Mike Demler Minimizing on-chip power consumption continues to be one of the greatest challenges facing SoC designers. Everyone who owns a cell phone has undoubtedly seen the effect on limited battery life firsthand, but the impact on the unseen compute servers in “the cloud” is even more severe, making total electrical operating costs greater than the hardware expense, according to AMD ... » read more

Tri-Gate’s Fallout

By Ed Sperling - 26 May, 2011 - Comments: 0

By David Lammers Intel Corp. dropped a rock into the pond of transistor technology when it announced its 22nm tri-gate technology in San Francisco earlier this month. The ripples continue to move out from that event, with impacts on IDMs, foundries, and fabless semiconductor companies being closely studied. Now that Intel has come out of the closet with its tri-gate technology, “the found... » read more

Gene’s Law Meets EDA

By Ed Sperling - 17 Mar, 2011 - Comments: 0

By Pallab Chatterjee What will be the next major improvement that will cut power levels by an order of magnitude? That question was the basis of a roundtable discussion at the recent ISSC conference. Current technology provides incremental improvements each year, but the next generation of electronic systems will require dramatic changes and innovation. This premise is based on Gene’s Law... » read more

Healthy Living Electronics Dominated By Power

By Ed Sperling - 10 Feb, 2011 - Comments: 0

By Pallab Chatterjee The theme for this years ISSCC (International Solid State Circuits Conference) is “Electronics for Healthy Living.” In addition to the new microprocessors, memory and data converter technologies, the focus and keynotes are directed toward health-care products. The common theme between all the talks is that health-care is being driven by mobility, information flow, a... » read more

The Power In Errors

By Ed Sperling - 09 Sep, 2010 - Comments: 0

By David Lammers Since 1956, some of the top minds in information processing, including Claude Shannon and John von Neumann, have been pondering the problem of how to build reliable systems out of unreliable components. The communications industry embraced the challenge, and deployed error correction techniques to ensure that today’s most sensitive information is transmitted reliably over no... » read more

Power Delivery Issues

By Ed Sperling - 10 Nov, 2009 - Comments: 0

By Ed Sperling Reducing the voltage in a system on chip is like turning down the water pressure on a home plumbing system. Pretty soon you find out that not all the faucets work properly because there isn’t enough pressure behind them. While it’s vital to drop the voltage to boost battery life in mobile devices, not to mention reduce the overall power consumption in plug-in devices, t... » read more

3D Integration: Extending Moore’s Law Into The Next Decade

By Cheryl Ajluni - 27 Aug, 2009 - Comments: 0

By Cheryl Ajluni At the 46th Design Automation Conference in San Francisco last month, attention turned to a discussion of how to extend the momentum of Moore’s Law into the next decade. One plausible solution, according to Philippe Magarshack, the general manager of Central CAD & Design Solutions at STMicroelectronics, is 3D stacking for complex System-on-Chips (SoCs). The concept of 3... » read more

Tech Talk: Saving Power By The Milliwatt

By Ed Sperling - 02 Apr, 2009 - Comments: 0

Jan Rabaey, head of UC Berkeley's Wireless Research Center and the author of a new book entitled, "Low Power Design Essentials," discusses how to generate small amounts of power and what can be done to reduce the amount of power needed for semiconductor design. [youtube vid=G0j1Sm8RCns] » read more

The Trouble With Multicore Software

By Ed Sperling - 12 Feb, 2009 - Comments: 0

David Patterson, Professor of Computer Science at UC Berkeley, presented his views to the Naval Postgraduate School about the prospects for multicore programming success. This video was excerpted from his presentation. [youtube vid=EDHXIH8DlLY] » read more

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Knowledge Centers
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