Firms Rethink Fabless-Foundry Model

Joint ventures, investments and other options all being considered as virtual IDM model becomes attractive.


By Mark LaPedus
As chipmakers move toward 20nm designs, finFETs and 3D stacked devices, the industry is beginning to re-think the fabless-foundry model.

Leading-edge foundries are finally getting serious about the “virtual IDM” model, in which vendors will act more like integrated device manufacturers (IDMs), as opposed to being mere production partners. In this model, the foundries are not only manufacturing partners, but there is a deeper collaboration within a customer’s design team.

In fact, given the variability challenges with finFETs, there is a school of thought that chipmakers must reside at the same physical location as their foundry partners’ fabs to ensure that design and manufacturing are on the same page. Otherwise, according to some experts, the chances for first-silicon success are shaky.

For this reason and others, Taiwan Semiconductor Manufacturing Co. (TSMC) may take the “virtual IDM” model a step further. TSMC is considering a plan to build separate fabs for individual companies. And as part of its strategy, TSMC has accelerated its finFET roadmap.

Rival GlobalFoundries is considering a plan to offer dedicated modules within a fab for customers. And taking another approach, United Microelectronics Corp. has floated an equity placement under which companies can buy a 10% stake in UMC. UMC also has licensed IBM’s 20nm and finFET technologies.

Another foundry vendor, Samsung Electronics Co, has perhaps set the tone for the industry: It has already built a dedicated fab for Apple. And separately, in a surprise move, fabless chipmaker Qualcomm is considering the idea of building its own fab to gain better control of the manufacturing process.

Qualcomm CEO “Paul Jacobs has discussed it openly of late,” said G. Dan Hutcheson, president of VLSI Research. “Qualcomm certainly has the revenues to build its own fab and start making its own wafers. The chance of success is still low. It would cost at least three times, and possibly as much as five times, to successfully get your first fab to viable production, or approximately $15 billion to $25 billion. In other words, it would be an out-of-body experience for the management team that tries it.”

Sea of change
In any case, there could be a sea of change taking place in the traditional fabless-foundry model. “The traditional foundry model, where you throw a GDS2 file over the wall, no longer works,” said Mojy Chian, senior vice president of design enablement at GlobalFoundries. “We have to work closer with the fabless guys. New challenges at 20nm and beyond will require deep, IDM-like collaboration to accelerate the time-to-market. In fact, the collaboration should start two to two-and-a-half years ahead of tape out.”

In the late 1980s, the pure-play foundries emerged, which spawned a plethora of fabless companies. One of the drawbacks with the fabless-foundry model is that the design houses and foundries sometimes work in silos and do not cooperate. In some cases, fabless vendors will throw a clunky design “over the wall” to the foundries, which are still expected to make the chip on time. This brute-force methodology has experienced mixed success.

The fabless and foundry firms began to change their ways at the 130nm node amid soaring IC design and manufacturing costs. “130nm is when process and design began to be recoupled. The result was the rise of DFM, which didn’t exist before then,” said VLSI’s Hutcheson.

Then, starting in the early part of this decade, several foundries billed themselves as “virtual IDMs,” claiming they would work more closely with customers. But some of those efforts have fallen short of expectations. “The leading fabless suppliers got hurt badly when the leading foundries hadn’t dealt well with variability at 40nm, and more recently, with design-manufacturing interactive yield losses at 28nm,” Hutcheson said.

Now, as the IC industry moves toward the 20nm node and beyond, the foundries have become more serious about embracing the “virtual IDM” model and for good reason: The stakes are higher. At 130nm, a fab was $1.45 billion, process R&D costs were $250 million, and design costs were $15 million. But at 22nm, a fab runs $6.7 billion, process R&D is $1.3 billion, and design costs are $150 million.

Simply put, the traditional foundry model must evolve. “You can’t do it in silos,” said Subramani Kengeri, head of advanced technology architecture at GlobalFoundries. “The key is to have a tighter integration between product design and manufacturing.”

This is especially true in the finFET era. Intel has moved finFETs into production at 22nm. Given the variability issues, the foundries face challenges to put finFETs into production at 14nm.

Intel and the foundries are in the bulk finFET camp. But to make the finFET transition easier, the foundries should look at silicon-on-insulator (SOI) technology, said Chenming Calvin Hu, professor of electrical engineering at the University of California at Berkeley. “We are going to see (both bulk and SOI finFETs) in volume manufacturing,” Hu said. “[SOI] is easier. The supply chain is the one thing that manufacturers need to be assured of.”

New business models
On the business side, the industry could take one of two routes: Maintain the fabless-foundry status quo or move toward a “virtual IDM” model. Morris Chang, chairman and chief executive of TSMC, sees yet another model: Build dedicated fabs or joint-venture fabs for larger customers.

“We made our mark serving many customers (in multiple fabs). We will retain that capability,” Chang said during a recent conference call. “There are going to be larger customers. So it makes complete sense to have one dedicated fab, or more than one fab, for one customer.”

GlobalFoundries, meanwhile, is considering a slightly different model. “This is hypothetical,” said GlobalFoundries’ Kengeri. “Within a fab, we have modules. If one of our customers wants a dedicated module, it’s open for discussion.”

In that arrangement, a chipmaker may have to share the risk and cost. And it must make economic sense. Clearly, though, Apple is one candidate for a dedicated fab. In fact, Samsung already has built a dedicated fab for Apple in Austin, Texas.

Altera, Broadcom, Nvidia, Qualcomm and Xilinx are also possible candidates to occupy part or all of a fab. Qualcomm, for one, has the volumes and already is sourcing parts from all of the leading-edge foundries to keep up with 28nm demand.

Qualcomm’s multi-foundry sourcing strategy “is a very expensive approach today, as designs don’t port to multiple foundries like they used to,” said VLSI’s Hutcheson. “Yields are far more difficult to obtain at these advanced nodes, and splitting production across multiple fabs means either less relevant data per learning cycle or longer learning cycle times. That results in longer time-to-money and higher costs, making going the IDM route seem more attractive.”

It’s unlikely that Qualcomm will build its own fab, but it is possible it will end up with a joint venture fab with a foundry. In addition, Qualcomm and others would like the foundries to speed up their process roadmaps. The foundries are falling behind Intel, which also offers foundry services on a limited basis.

TSMC, for one, plans to accelerate its finFET efforts. Originally, TSMC planned to introduce finFETs at 14nm by late 2014. Now, the company has no plans to brand its finFETs at 14nm, but rather it will introduce the technology at 16nm. TSMC’s finFET “risk production” is slated for the end of 2013 or early 2014, with production scheduled for the second half of 2015, Chang said.

TSMC is not banking on extreme ultraviolet (EUV) lithography for 16nm. “We are very confident we can make 16nm finFETs without EUV,” he said. “I think EUV will come in at 10nm.”

To accelerate 450mm fabs and EUV in the market, Intel recently inked a deal with ASML. ASML has also enabled customers to take a 25% stake in the company. Intel plans to acquire up to a 15% stake in ASML.

TSMC and Samsung are also negotiating with ASML to take separate stakes in ASML. Taking a page from the ASML-Intel deal, UMC separately floated private equity shares under which strategic partners can take up to a 10% stake in UMC.

This represents a change for UMC. The company has developed its own processes and has shied away from forming strategic alliances. UMC has controlled its own destiny, but it also has fallen behind its rivals.

To jumpstart its process roadmap, UMC recently licensed 20nm and finFET technology from IBM. UMC’s finFET technology is reportedly a 14nm or 16nm front-end, with 20nm backend. “For UMC to do a finFET from scratch is very challenging,” said Shih-Wei Sun, chief executive of UMC, in a recent conference call. “This will kick start our finFET efforts.”

GlobalFoundries and Samsung have yet to change their finFET strategies. GlobalFoundries still plans to roll out a finFET at the 14nm node in the fourth quarter of 2014 or first quarter of 2015, according to Kengeri.