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Fully CMOS-compatible Ternary Inverter with a Memory Function Using Silicon Feedback Field-Effect Transistors (FBFETs)


New technical paper titled "New ternary inverter with memory function using silicon feedback field-effect transistors" was published from researchers at Korea University. Abstract: In this study, we present a fully complementary metal–oxide–semiconductor-compatible ternary inverter with a memory function using silicon feedback field-effect transistors (FBFETs). FBFETs operate with a pos... » read more

Flip-Chip Integration of a GaSb Semiconductor Optical Amplifier with a Silicon Photonic Circuit


New research paper titled "Hybrid silicon photonics DBR laser based on flip-chip integration of GaSb amplifiers and µm-scale SOI waveguides" by researchers at Tampere University (Finland). Abstract: "The development of integrated photonics experiences an unprecedented growth dynamic, owing to accelerated penetration to new applications. This leads to new requirements in terms of functional... » read more

Silicon Thermo-Optic Switches with Graphene Heaters Operating at Mid-Infrared Waveband


Abstract "The mid-infrared (MIR, 2–20 μm) waveband is of great interest for integrated photonics in many applications such as on-chip spectroscopic chemical sensing, and optical communication. Thermo-optic switches are essential to large-scale integrated photonic circuits at MIR wavebands. However, current technologies require a thick cladding layer, high driving voltages or may introduce h... » read more

Label-Free C-Reactive Protein Si Nanowire FET Sensor Arrays With Super-Nernstian Back-Gate Operation


Abstract: "We present a CMOS-compatible double gate and label-free C-reactive protein (CRP) sensor, based on silicon on insulator (SOI) silicon nanowires arrays. We exploit a reference subtracted detection method and a super-Nernstian internal amplification given by the double gate structure. We overcome the Debye screening of charged CRP proteins in solutions using antibodies fragments as c... » read more

Thinner Channels With 2D Semiconductors


Moving to future nodes will require more than just smaller features. At 3/2nm and beyond, new materials are likely to be added, but which ones and exactly when will depend upon an explosion of material science research underway at universities and companies around the globe. With field-effect transistors, a voltage applied to the gate creates an electric field in the channel, bending the ban... » read more

Upturn Seen For Silicon Wafer Market


After a downturn in 2019, the silicon wafer market is expected to rebound in 2020. 2021 looks even better for silicon wafers. Silicon wafers are a fundamental part of the semiconductor business. Every chipmaker needs to buy them in one size or another. Silicon wafer vendors produce and sell bare or raw silicon wafers to chipmakers, who in turn process them into chips. The silicon wafer ma... » read more

A Benchmark Study Of Complementary-Field Effect Transistor (CFET) Process Integration Options: Comparing Bulk vs. SOI vs. DSOI Starting Substrates


Sub-5 nm logic nodes will require an extremely high level of innovation to overcome the inherent real-estate limitations at this increased device density. One approach to increasing device density is to look at the vertical device dimension (z-direction), and stack devices on top of each other instead of conventionally side-by-side. The fabrication of a Complementary-Field Effect Transistor (CF... » read more

ESD Requirements Are Changing


Standards for specifying a chip’s ability to withstand electrostatic discharge (ESD) are changing – in some cases, getting tougher, and in others, easing up. ESD protection has been on a path from a one-size-fits-all approach to one where a signal’s usage helps to determine what kind of protection it should get. Protecting chips from ESD damage has been a longstanding part of IC design... » read more

A Benchmark Study Of Complementary-Field Effect Transistor (CFET) Process Integration Options Done By Virtual Fabrication


Four process flow options for Complementary-Field Effect Transistors (C-FET), using different designs and starting substrates (Si bulk, Silicon-On-Insulator, or Double-SOI), were compared to assess the probability of process variation failures. The study was performed using virtual fabrication techniques without requiring fabrication of any actual test wafers. In the study, Nanosheet-on-Nanoshe... » read more

Design Of An Ultra-Low-Power Current Steering DAC In A Modern SOI technology


Despite the tremendous advancement in innovations on digitizing and processing signals over the last century, real world signals are inevitably analog in nature. A digital-to-analog converter (DAC) serves in translating these digitized signals into different analog quantities like voltage, current or charges. We mainly focus on a Nyquist-rate current-steering digital- to-analog converte... » read more

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