A Benchmark Study Of Complementary-Field Effect Transistor (CFET) Process Integration Options


Sub-5 nm logic nodes will require an extremely high level of innovation to overcome the inherent real-estate limitations at this increased device density. One approach to increasing device density is to look at the vertical device dimension (z-direction), and stack devices on top of each other instead of conventionally side-by-side. [1] The fabrication of a Complementary-Field Effect Transistor... » read more

Manufacturing Bits: April 23


Sorting nuclei CERN and GSI Darmstadt have begun testing the first of two giant magnets that will serve as part of one of the largest and most complex accelerator facilities in the world. CERN, the European Organization for Nuclear Research, recently obtained two magnets from GSI. The two magnets weigh a total of 27 tons. About 60 more magnets will follow over the next five years. These ... » read more

Mixed Outlook For Silicon Wafer Biz


After a period of record growth, the silicon wafer industry is off to a slow start in 2019 and facing a mixed outlook. Generally, 200mm silicon wafer supply remains tight. But demand for 300mm silicon wafers is cooling off in some segments, causing supply to move toward equilibrium after a period of shortages. On average, though, silicon wafer prices continue to rise despite the slowdown. ... » read more

Manufacturing Bits: Jan. 2


Better nanowire MOSFETs At the recent IEEE International Electron Devices Meeting (IEDM), Imec and Applied Materials presented a paper on a new and improved way to fabricate vertically stacked gate-all-around MOSFETs. More specifically, Imec and Applied reported on process improvements for a silicon nanowire MOSFET, which is integrated in a CMOS dual work function metal replacement metal ga... » read more

A Crisis In DoD’s Trusted Foundry Program?


The U.S. Department of Defense’s Trusted Foundry program is in flux due to GlobalFoundries’ recent decision to put 7nm on hold, raising national security concerns across the U.S. defense community. U.S. DoD and military/aerospace chip customers currently have access to U.S.-based “secure” foundry capacity down to 14nm, but that's where it ends. No other foundries provide similar “s... » read more

The Advantages Of FD-SOI Technology


If my memory serves me well, it was at the 1989 Device Research Conference where the potential merits of SOI (Silicon on Insulator) technology were discussed in a heated evening panel discussion. At that panel discussion, there were many advocates for SOI, as well as many naysayers. I didn’t really think more about SOI technology until the mid-nineties, when I was sitting in a meeting where t... » read more

Achieving The Vision Of Silicon Photonics Processing


With the increasing need for faster data transfer rates, the transition from electrical to optical signaling in data processing is inevitable. Copper cabling cannot keep up with the upcoming data center bandwidth requirements for applications such as multimedia streaming and high performance computing. One technology that could enable true optical communication is silicon photonics. Silicon is ... » read more

FinFET Front-End-of-Line (FEOL) Process Integration With SEMulator3D


Purely geometric scaling of transistors ended around the 90-nanometer (nm) era. Since then, most power/performance and area/cost improvements have come from structural and material innovations. Silicon-on-Insulator (SOI), first “partially depleted” and more recently “fully depleted” as well as embedded stressors, High-K / Metal-Gate (HKMG) and now FinFETs are examples of technology inno... » read more

How Will 5G Work?


Sumit Tomar, general manager of the Wireless Infrastructure Products Group at RF chip giant Qorvo, sat down with Semiconductor Engineering to discuss the development of next-generation 5G wireless networks and other topics. In 2014, RF Micro Devices and TriQuint merged to form Qorvo. What follows are excerpts of that conversation. SE: 5G, the follow-on to the current wireless standard known ... » read more

The Trouble With MEMS


The advent of the Internet of Things will open up a slew of new opportunities for MEMS-based sensors, but chipmakers are proceeding cautiously. There are a number of reasons for that restraint. Microelectromechanical systems are difficult to design, manufacture and test, which initially fueled optimism in the MEMS ecosystem that this market would command the same kinds of premiums that analo... » read more

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