Prototyping Partitioning Problems


Gaps are widening in the prototyping of large, complex chips because the speed and capacity of the FPGA is not keeping pace with rapid rollout pace of advanced ASICs. This is a new twist for a well-established market. Indeed, prototyping with FPGAs is as old as the [gettech id="31071" t_name="FPGAs"] themselves. Even before they were called FPGAs, logic accelerators or LCAs (logic cell ar... » read more

The Secret Life Of Accelerators


Accelerator chips increasingly are providing the performance boost that device scaling once provided, changing basic assumptions about how data moves within an electronic system and where it should be processed. To the outside world, little appears to have changed. But beneath the glossy exterior, and almost always hidden from view, accelerator chips are becoming an integral part of most des... » read more

Whatever Happened To HLS?


A few years ago, [getkc id="105" comment="high-level synthesis"] (HLS) was probably the most talked about emerging technology that was to be the heart of a new [getkc id="48" kc_name="Electronic System Level"] (ESL) flow. Today, we hear much less about the progress being made in this area. Semiconductor Engineering sat down to discuss this with Bryan Bowyer, director of engineering for high-lev... » read more

Embedded FPGAs Come Of Age


FPGAs increasingly are being viewed as a critical component in heterogeneous designs, ratcheting up their stature and the amount of attention being given to programmable devices. Once relegated to test chips that ultimately would be replaced by lower-power and higher-performance ASICs if volumes were sufficient, FPGAs have come a long way. Over the last 20 years programmable devices have mov... » read more

Blog Review: Nov. 16


Cadence's Paul McLellan highlights a talk from the recent Jasper User Group by ARM's Daryl Stewart on how the company saw the value of formal verification. Synopsys' Patrick Sheridan looks at the benefits of using SystemC TLM-2.0 AT for virtual prototype architecture modeling. Mentor's Jim Martens argues for the importance of a reliable power delivery network. A Lam Research staff writ... » read more

The Battle To Embed The FPGA


There have been many attempts to embed an [gettech id="31071" comment="FPGA"] into chips in the past, but the market has failed to materialize—or the solutions have failed to inspire. An early example was [getentity id="22924" comment="Triscend"], founded in 1997 and acquired by [getentity id="22839" e_name="Xilinx"] in 2004. It integrated a CPU—which varied from an [getentity id="22186" co... » read more

Embedded FPGAs Going Mainstream?


Systems on chip have been made with many processing variants ranging from general-purpose CPUs to DSPs, GPUs, and custom processors that are highly optimized for certain tasks. When none of these options provide the necessary performance or consumes too much power, custom hardware takes over. But there is one type of processing element that has rarely been used in a major SoC— the [gettech id... » read more

Blog Review: Oct. 26


Synopsys' Robert Vamosi provides some additional information on last Friday's massive DDoS attack against DNS provider Dyn, which hampered access to many big-name websites. On the same note, Cadence's Paul McLellan warns of the hazards default and easy-to-guess device passwords present to people far beyond the original user. Mentor's Arvind Narayanan warns that the 10nm era has changed ph... » read more

Blog Review: Oct. 12


Mentor's Harry Foster digs into verification technology adoption trends for ASIC/IC. Cadence's Tom Anderson looks at the goals of the Portable Stimulus Working Group and how they compare to those of UVM. Synopsys' Eric Huang checks out what's new in the land of USB, Type-C adoption, and cable testing. Ansys' Aveek Sarkar explores the challenges facing 7nm designs and the benefits of ch... » read more

Blog Review: Sept. 21


Mentor's Ricardo Anguiano takes a look at a proposal to prevent auto accidents from becoming pile-ups: the relaying of hazard information to the cloud and on to upcoming vehicles. Why get rid of 3.5mm audio jacks? Synopsys' Michael Posner says it's all about the power optimization in the upcoming USB Type-C digital audio specification. NXP's Anand Kannan also thinks Type-C should be the d... » read more

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