Sensors Will Proliferate In SoCs


No one likes being put on the spot, and yet we all like a forecast…and as we all know, the only guarantee with a forecast is that it is wrong. Sports commentators have carved out a special niche for themselves with the ‘commentators curse:’ just as they extol the virtues of an individual or a team, the sporting gods prove them wrong in spectacular fashion! Governments are no better: econo... » read more

Post Layout Simulation Is Becoming The Bottleneck For Analog Verification


My, have times changed. I remember when I first started out as a green analog designer right out of college, we would cut rubylith masking film on a large light table representing the different layers of our design to generate the design for manufacturing of the chip. We proactively worked to mitigate cross coupling of noise to our signal nets, but we were rarely concerned about interconnect re... » read more

New Approaches For Dealing With Thermal Problems


New thermal monitoring, simulation and analysis techniques are beginning to coalesce in chips developed at leading-edge nodes and in advanced packages in order to keep those devices running at optimal temperatures. This is particularly important in applications such as AI, automotive, data centers and 5G. Heat can kill a chip, but it also can cause more subtle effects such as premature aging... » read more

Week In Review: Manufacturing, Test


Market research The coronavirus is having a major impact on the semiconductor, smartphone and related markets. For example, global fab equipment spending promises to rebound from its 2019 downturn and see a modest recovery this year, according to a report from SEMI. But the coronavirus (COVID-19) outbreak has eroded fab equipment spending in China and elsewhere in 2020, according to the rep... » read more

Manufacturing Bits: Feb. 25


Diamond finFETs HRL Laboratories has made new and significant progress to develop diamond finFETs. HRL, a joint R&D venture between Boeing and General Motors, has developed a new ohmic regrowth technique for diamond FETs. This in turn could pave the way towards commercial diamond FETs. Applications include spacecraft, satellites and systems with extreme temperatures. Still in R&D, diamo... » read more

Going On the Edge


Emmanuel Sabonnadière, chief executive of Leti, sat down with Semiconductor Engineering to talk about artificial intelligence (AI), edge computing and chip technologies. What follows are excerpts of that conversation. SE: Where is AI going in the future? Sabonnadière: I am a strong believer that edge AI will change our lives. Today’s microelectronics are organized with 80% of things i... » read more

Influence Of SiGe On Parasitic Parameters in PMOS


In this paper, simulation-based design-technology co-optimization (DTCO) is carried out using the Coventor SEMulator3D virtual fabrication platform with its integrated electrical analysis capabilities [1]. In our study, process modeling is used to predict the sensitivity of FinFET device performance to changes in a silicon germanium epitaxial process. The simulated process is a gate-last flow p... » read more

Week in Review – IoT, Security, Auto


Products/Services Synopsys announced successful deployment of the Synopsys Yield Explorer yield learning platform for fast ramp-up of new products on Samsung's advanced finFET technology nodes. Using the secure data exchange mechanism in Yield Explorer, Samsung is able to share the data required for yield analysis, such as chip design, fab, and test, with its customers while maintaining the co... » read more

Controlling Variability And Cost At 3nm And Beyond


Richard Gottscho, executive vice president and CTO of Lam Research, sat down with Semiconductor Engineering to talk about how to utilize more data from sensors in manufacturing equipment, the migration to new process nodes, and advancements in ALE and materials that could have a big impact on controlling costs. What follows are excerpts of that conversation. SE: As more sensors are added int... » read more

Target: 50% Reduction In Memory Power


Memory consumes about 50% or more of the area and about 50% of the power of an SoC, and those percentages are likely to increase. The problem is that static random access memory (SRAM) has not scaled in accordance with Moore's Law, and that will not change. In addition, with many devices not chasing the latest node and with power becoming an increasing concern, the industry must find ways to... » read more

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