DAC/Semicon West Addresses Top Issues, Trends For Chips


The Design Automation Conference (DAC) 2023 and Semicon West returned in full force this week, drawing in more attendees and sponsor companies than since before the pandemic. At times, booth traffic was four to five deep, blocking aisles, and standing room only was common at presentations. Hot topics included generative AI and the underlying semiconductor technology, data security, reliabili... » read more

Week In Review: Design, Low Power


AMD plans to spend $135 million in Ireland over four years to boost its adaptive computing segment, formerly Xilinx. The investment will fund R&D projects for next generation AI, data center, networking, and 6G communications infrastructure. The company will also add up to 290 engineering and research positions. Argonne National Laboratory installed the final blade of its Aurora supercom... » read more

Chip Industry’s Technical Paper Roundup: May 23


New technical papers recently added to Semiconductor Engineering’s library: [table id=104 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us... » read more

Non-Traditional Design of Dynamic Logic Gates and Circuits with FDSOI FETs


A new technical paper titled "Non-Traditional Design of Dynamic Logics using FDSOI for Ultra-Efficient Computing" was published by researchers at University of Stuttgart, UC Berkeley, Indian Institute of Technology Kanpur, and TU Munich, with funding by the German Research Foundation. Abstract "In this paper, we propose a non-traditional design of dynamic logic circuits using Fully-Deplet... » read more

Chip Industry’s Technical Paper Roundup: Apr. 18


New technical papers recently added to Semiconductor Engineering’s library: [table id=93 /]   If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involv... » read more

Design Considerations and Recent Advancements in Chiplets (UC Berkeley/ Peking University)


A new technical paper titled "Automated Design of Chiplets" was published by researchers at UC Berkeley and Peking University. Abstract: "Chiplet-based designs have gained recognition as a promising alternative to monolithic SoCs due to their lower manufacturing costs, improved re-usability, and optimized technology specialization. Despite progress made in various related domains, the des... » read more

Week In Review: Semiconductor Manufacturing, Test


Semiconductor Research Corporation (SRC) released an interim roadmap for Microelectronic and Advanced Packaging Technologies (MPAT) that targets 10- to 15-year goals for 3D integration and multi-chiplet packaging. The roadmap is open for comments. Participants in the MPAT include AMD, IBM, Intel, Texas Instruments, Purdue University, SUNY Binghamton and the Georgia Institute of Technology. It i... » read more

Is UCIe Really Universal?


Chiplets are rapidly becoming the means to overcome the slowing of Moore's Law, but whether one interface is capable of joining them all together isn't clear yet. The Universal Chiplet Interconnect Express (UCIe) believes it will work, but some in the industry remain unconvinced. At least part of the problem is that interconnect standards are never truly finished. Even today, the protocols tha... » read more

Week In Review: Semiconductor Manufacturing, Test


Fallout from the new U.S. export controls continues. Under new regulations, companies looking to supply Chinese chipmakers with advanced manufacturing equipment (<14nm) must first obtain a license from the U.S. Department of Commerce. In addition, U.S. persons (citizens and permanent residents) are barred from supporting China’s advanced chip development or production without a license. ... » read more

Blog Review: Oct. 5


Arm's Andrew Pickard chats with Georgia Tech's Azad Naeemi and Da Eun Shim about an effort to evaluate the benefit of new interconnect materials and wire geometry and determine their impacts at the microprocessor level. Synopsys' Shekhar Kapoor shares highlights from a recent panel exploring the promises, challenges, and realities of 3D IC technology, including the potential of 3D nanosystem... » read more

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