Multi-chiplet accelerators; photoresists for EUV; STT-MRAM; FPGA fault injection; formal verification; speculative vulnerabilities; phase-change materials in photonics.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| Communication Characterization of AI Workloads for Large-scale Multi-chiplet Accelerators | Universitat Politecnica de Catalunya |
| Recent Advances in Metal-Oxide-Based Photoresists for EUV Lithography | University of South–Eastern Norway |
| Impact of external magnetic fields on STT-MRAM | Univ. Grenoble Alpes, Everspin, GF, imec, et al. |
| Hacking the Fabric: Targeting Partial Reconfiguration Fault Injection in FPGA Fabrics | Arizona State University and Karlsruhe Institute of Technology (KIT) |
| FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware | UC Berkeley and NVIDIA |
| Lost and Found in Speculation: Hybrid Speculative Vulnerability Detection | Technical University of Darmstadt and Texas A&M University |
| Programmable phase change materials and silicon photonics co-integration for photonic memory applications: a systematic study | Colorado State University, CEA-LETI, and UC Berkeley |
| Verifying Non-friendly Formal Verification Designs: Can We Start Earlier? | Universität Kaiserslautern-Landau and Infineon Technologies |
Further Reading
Chip Industry Week In Review
Silicon Valley design center and NY EUV Accelerator; Siemens’ big acquisition; Onto extends panel inspection with two acquisitions; DENSO-Quadric deal; thinner Si-based power wafer; $100M funding for AI; trade wars escalate; earnings reports.
Technical Paper Library home
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