Chip Industry Technical Paper Roundup: April 2


New technical papers recently added to Semiconductor Engineering’s library. [table id=211 /] Find last week’s technical paper additions here. » read more

Optimizing Quantum Gates For Error Correction in Superconducting Qubits (Google AI)


A new technical paper titled "Optimizing quantum gates towards the scale of logical qubits" was published by researchers at Google AI and UC Riverside. Abstract "A foundational assumption of quantum error correction theory is that quantum gates can be scaled to large processors without exceeding the error-threshold for fault tolerance. Two major challenges that could become fundamental road... » read more

Chip Industry Week In Review


By Adam Kovac, Karen Heyman, and Liz Allan. Europe's semiconductor footprint is growing in areas that previously had little association with chips. Silicon Box plans to build a panel-level foundry in northern Italy, funded in part by the Italian government. The deal is worth around €3.2 billion ($3.6B). In addition, imec will establish a specialized 300mm chip technology pilot line in M... » read more

Chip Industry’s Technical Paper Roundup: Nov. 29


New technical papers added to Semiconductor Engineering’s library this week. [table id=66 /]   Related Reading: Chip Industry’s Technical Paper Roundup: Nov. 21 New papers: lithography modeling; solving Rowhammer; energy-efficient batch normalization HW; 3-to-1 reconfigurable analog signal modulation circuit; lateral double magnetic tunnel junction; reduce branch mispredic... » read more

Phononic and Magnonic Properties of 1D MoI3 Nanowires


A new technical paper titled "Elemental excitations in MoI3 one-dimensional van der Waals nanowires" was published by researchers at NIST, UC Riverside, University of Georgia, Theiss Research Inc, and Stanford University. "We described here the elemental excitations in crystals of MoI3 a vdW [van der Waals] material with a true-1D crystal structure. Our measurements reveal anomalous temperat... » read more

DNS Cache Poisoning Attack: Resurrections with Side Channels


Abstract "DNS is one of the fundamental and ancient protocols on the Internet that supports many network applications and services. Unfortunately, DNS was designed without security in mind and is subject to a variety of serious attacks, one of which is the well-known DNS cache poisoning attack. Over the decades of evolution, it has proven extraordinarily challenging to retrofit strong security... » read more

A New Multi-Stimuli-Based Simulation Method for ESD Design Verification


Abstract: "This paper analyzes TCAD ESD simulation for both HBM zapping using real-world HBM ESD waveforms as stimuli and TLP testing using square wave TLP pulse trains as stimuli. It concludes that TCAD ESD simulation using either HBM waveforms or TLP pulse trains, alone, is insufficient. We introduce a new mixed-mode simulation flow using combined HBM and TLP stimuli to achieve ESD design pr... » read more

Leaky Buddies: Cross-Component Covert Channels on Integrated CPU-GPU Systems


Find Technical Paper link here. Abstract: "Graphics Processing Units (GPUs) are ubiquitous components used across the range of today’s computing platforms, from phones and tablets, through personal computers, to high-end server class platforms. With the increasing importance of graphics and video workloads, recent processors are shipped with GPU devices that are integrated on the same chi... » read more

System Bits: Oct. 9


Bringing plasmonic color to solid materials Researchers at the University of California, Riverside, used silver nanoparticles (AgNPs) to produce plasmonic color-switchable films for solid materials. This effect was previously achieved only in liquids. Rapid and reversible tuning of plasmonic color in solid films, a challenge until now, holds great promise for a number of applications,” sa... » read more

System Bits: Sept. 3


Microprocessor built with carbon nanotubes Researchers at the Massachusetts Institute of Technology were able to design a microprocessor with carbon nanotubes and fabricate the chip with traditional processes, an advance that could be used in next-generation computers. Work on producing carbon nanotube field-effect transistors has gone on for some time. Fabricated at scale, those CNFETs oft... » read more

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