tag: Ulsan National Institute of Science and Technology

Scalable Approach For Fabricating Sub-10nm Nanogaps
By Technical Paper Link - 07 Apr, 2025 - Comments: 0

A new technical paper titled "A progressive wafer scale approach for Sub-10 nm nanogap structures" was published by researchers at Seoul National University, Chung-Ang University, Mohammed VI Polytechnic University and Ulsan National Institute of Science and Technology. "We have advanced the atomic layer lithography method into an efficient, scalable approach for fabricating sub-10 nm nanoga... » read more

Research Bits: Apr. 7
By Jesse Allen - 07 Apr, 2025 - Comments: 0

DNA scaffolds for 3D electronics Researchers from Columbia University, Brookhaven National Laboratory, and University of Minnesota used DNA to help create self-assembled 3D electronic devices with nanometer-size features. The team deposited arrays of gold squares on a surface, onto which they could attach short pieces of DNA. These served as anchors to which they could fasten eight-sided di... » read more

Chip Industry Technical Paper Roundup: Mar. 25
By Linda Christensen - 25 Mar, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=415 /] Find more semiconductor research papers here. » read more

A Novel Tier Partitioning Method in 3DIC Placement Optimizing PPA
By Technical Paper Link - 11 Mar, 2025 - Comments: 0

A new technical paper titled "PPA-Aware Tier Partitioning for 3D IC Placement with ILP Formulation" was published by researchers at Seoul National University and Ulsan National Institute of Science and Technology. Abstract "3D ICs are renowned for their potential to enable high-performance and low-power designs by utilizing denser and shorter inter-tier connections. In the physical design f... » read more

Research Bits: Sept. 17
By Jesse Allen - 17 Sep, 2024 - Comments: 0

DNA data storage plus compute Researchers from North Carolina State University and Johns Hopkins University created a DNA-based device that can perform both data storage and computing functions. “Specifically, we have created polymer structures that we call dendricolloids – they start at the microscale, but branch off from each other in a hierarchical way to create a network of nanoscal... » read more

Research Bits: October 3
By Jesse Allen - 03 Oct, 2023 - Comments: 0

Growing indium selenide at scale Researchers from the University of Pennsylvania, Brookhaven National Laboratory, and the Air Force Research Laboratory grew the 2D semiconductor indium selenide (InSe) on a full-size, industrial-scale wafer. It can also be deposited at temperatures low enough to integrate with a silicon chip. The team noted that producing large enough films of InSe has prove... » read more

Chip Industry’s Technical Paper Roundup: August 22
By Linda Christensen - 22 Aug, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=129 /]   More Reading Technical Paper Library home » read more

High-Performance P-Type FET Arrays With Single-Crystal 2D Semiconductors And Fermi-Level-Tuned vdW Contact Electrodes
By Technical Paper Link - 15 Aug, 2023 - Comments: 0

A technical paper titled “Fabrication of p-type 2D single-crystalline transistor arrays with Fermi-level-tuned van der Waals semimetal electrodes” was published by researchers at Ulsan National Institute of Science and Technology (UNIST), University of Pennsylvania, Institute for Basic Science (IBS), Sogang University, and Changwon National University. Abstract: "High-performance p-type t... » read more

Technical Paper Round-Up: March 29
By Linda Christensen - 29 Mar, 2022 - Comments: 0

Improving batteries, ultra low-power photonic edge computing, SLAM, Tellurium for 2D semiconductors, and reservoir computing top the past week's technical papers. The focus on energy is critical as the edge buildout continues and more devices are connected to a battery, while research into new architectures and materials that will continue scaling and improve performance per watt continue at th... » read more

Flat-surface-assisted and self-regulated oxidation resistance of Cu(111)
By Technical Paper Link - 22 Mar, 2022 - Comments: 0

Abstract "Oxidation can deteriorate the properties of copper that are critical for its use, particularly in the semiconductor industry and electro-optics applications. This has prompted numerous studies exploring copper oxidation and possible passivation strategies. In situ observations have, for example, shown that oxidation involves stepped surfaces: Cu2O growth occurs on flat surfaces as a ... » read more

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