Graphene-based memristive neuromorphic devices; HW-SW confidentiality verification; chiplet-based FHE accelerator; p-type 2D transistor arrays; phased array antennas for 5G/mmWave; solid-state batteries; ZVS SiC MOSFETs; 5G front-end modules; magnetic racetracks.
New technical papers added to Semiconductor Engineering’s library this week.
| Technical Paper | Research Organizations |
|---|---|
| SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors | RWTH Aachen University, Robert Bosch, and Newcastle University |
| CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure | Seoul National University |
| A Review of Graphene-Based Memristive Neuromorphic Devices and Circuits | James Cook University (Australia) and York University (Canada) |
| Additively manufactured flexible on-package phased array antennas for 5G/mmWave wearable and conformal digital twin and massive MIMO applications | Georgia Institute of Technology |
| Optically Triggered Self-Adaptive Zero Voltage Switching | University of Cambridge, Zhejiang University, and Swiss Federal Institute of Technology |
| Circuits for 5G RF front-end modules | Skyworks Solutions Inc. |
| Design Strategies for Anodes and Interfaces Toward Practical Solid-State Li-Meta Batteries | Samsung Advanced Institute of Technology |
| Josephson transistor from the superconducting diode effect in domain wall and skyrmion magnetic racetracks | University of Basel |
| Fabrication of p-type 2D single-crystalline transistor arrays with Fermi-level-tuned van der Waals semimetal electrodes |
Ulsan National Institute of Science and Technology (UNIST), University of Pennsylvania, Institute for Basic Science (IBS), Sogang University, and Changwon National University |
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